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参数资料
型号： MPC8572PXAULB
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 32-BIT, 1333 MHz, MICROPROCESSOR, PBGA1023
封装： 33 X 33 MM, PLASTIC, FCBGA-1023
文件页数： 112/138页
文件大小： 1502K
代理商： MPC8572PXAULB
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
75
High-Speed Serial Interfaces (HSSI)
of the differential pair must have a single-ended swing less than 800mV and greater than
200mV. This requirement is the same for both external DC-coupled or AC-coupled connection.
— For external DC-coupled connection, as described in Section 15.2.1, “SerDes Reference
Clock Receiver Characteristics,” the maximum average current requirements sets the
requirement for average voltage (common mode voltage) to be between 100 mV and 400 mV.
Figure 45 shows the SerDes reference clock input requirement for DC-coupled connection
scheme.
— For external AC-coupled connection, there is no common mode voltage requirement for the
clock driver. Since the external AC-coupling capacitor blocks the DC level, the clock driver
and the SerDes reference clock receiver operate in different command mode voltages. The
SerDes reference clock receiver in this connection scheme has its common mode voltage set to
SGND_SRDSn. Each signal wire of the differential inputs is allowed to swing below and above
the command mode voltage (SGND_SRDSn). Figure 46 shows the SerDes reference clock
input requirement for AC-coupled connection scheme.
Single-ended Mode
— The reference clock can also be single-ended. The SDn_REF_CLK input amplitude
(single-ended swing) must be between 400 mV and 800 mV peak-peak (from Vmin to Vmax)
with SDn_REF_CLK either left unconnected or tied to ground.
—The SDn_REF_CLK input average voltage must be between 200 and 400 mV. Figure 47 shows
the SerDes reference clock input requirement for single-ended signaling mode.
— To meet the input amplitude requirement, the reference clock inputs might need to be DC or
AC-coupled externally. For the best noise performance, the reference of the clock could be DC
or AC-coupled into the unused phase (SDn_REF_CLK) through the same source impedance as
the clock input (SDn_REF_CLK) in use.
Figure 45. Differential Reference Clock Input DC Requirements (External DC-Coupled)
SD
n_REF_CLK
SD
n_REF_CLK
Vmax
< 800 mV
Vmin
> 0V
100 mV
< Vcm < 400 mV
200mV < Input Amplitude or Differential Peak < 800 mV
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相关代理商/技术参数
参数描述
MPC8572PXAULD 功能描述:微处理器 - MPU PQ38H CSM SNPB 1333 RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
MPC8572PXAULE 制造商:Freescale Semiconductor 功能描述:38H R211 NOE SNPB 1333 - Bulk
MPC8572PXAVNB 功能描述:微处理器 - MPU RV1.1.1 SNPB 1500 NOTENC RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
MPC8572PXAVND 功能描述:微处理器 - MPU PQ38H CSM SNPB 1500 RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
MPC8572PXAVNE 制造商:Freescale Semiconductor 功能描述:38H R211 NOE SNPB 1500 - Bulk
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