- 您现在的位置：买卖IC网 > PDF目录378674 > MPC961C (Motorola, Inc.) LOW VOLTAGE ZERO DELAY BUFFER PDF资料下载
参数资料
| 型号： | MPC961C |
| 厂商： | Motorola, Inc. |
| 英文描述： | LOW VOLTAGE ZERO DELAY BUFFER |
| 中文描述： | 低压零延迟缓冲器 |
| 文件页数： | 6/12页 |
| 文件大小： | 296K |
| 代理商： | MPC961C |
MPC961C
MOTOROLA
TIMING SOLUTIONS
DL207 — Rev 0
combination of the line impedances. The voltage wave
launched down the two lines will equal:
VL = VS ( Zo / (Rs + Ro +Zo))
Zo = 50
|| 50
Rs = 36
|| 36
Ro = 14
VL = 3.0 (25 / (18 + 14 + 25) = 3.0 (25 / 57)
= 1.31V
At the load end the voltage will double, due to the near
unity reflection coefficient, to 2.62V. It will then increment
towards the quiescent 3.0V in steps separated by one round
trip delay (in this case 4.0ns).
Figure 5. Single versus Dual Waveforms
TIME (nS)
V
3.0
2.5
2.0
1.5
1.0
0.5
0
2
4
6
8
10
12
14
OutB
tD = 3.9386
OutA
tD = 3.8956
In
Since this step is well above the threshold region it will not
cause any false clock triggering, however designers may be
uncomfortable with unwanted reflections on the line. To
better match the impedances when driving multiple lines the
situation in Figure 6. should be used. In this case the series
terminating resistors are reduced such that when the parallel
combination is added to the output buffer impedance the line
impedance is perfectly matched.
Figure 6. Optimized Dual Line Termination
14
MPC961
OUTPUT
BUFFER
RS = 22
ZO = 50
RS = 22
ZO = 50
14
+ 22
22
= 50
50
25
= 25
SPICE level and IBIS output buffer models are available
for engineers who want to simulate their specific interconnect
schemes.
Using the MPC961C in zero-delay applications
Nested clock trees are typical applications for the
MPC961C. Designs using the MPC961C as LVCMOS PLL
fanout buffer with zero insertion delay will show significantly
lower clock skew than clock distributions developed from
CMOS fanout buffers. The external feedback option of the
MPC961C clock driver allows for its use as a zero delay
buffer. By using the QFB output as a feedback to the PLL the
propagation delay through the device is virtually eliminated.
The PLL aligns the feedback clock output edge with the clock
input reference edge resulting a near zero delay through the
device. The maximum insertion delay of the device in
zero-delay applications is measured between the reference
clock input and any output. This effective delay consists of
the static phase offset, I/O jitter (phase or long-term jitter),
feedback path delay and the output-to-output skew error
relative to the feedback output.
Calculation of part-to-part skew
The MPC961C zero delay buffer supports applications
where critical clock signal timing can be maintained across
several devices. If the reference clock inputs of two or more
MPC961C are connected together, the maximum overall
timing uncertainty from the common CCLK input to any
output is:
tSK(PP) = t(
) + tSK(O) + tPD, LINE(FB) + tJIT(
) CF
This maximum timing uncertainty consist of 4
components: static phase offset, output skew, feedback
board trace delay and I/O (phase) jitter:
Figure 7. MPC961C max. device-to-device skew
tPD,LINE(FB)
tJIT(
)
+
t
SK(O)
–t(
)
+t(
)
tJIT(
)
+
t
SK(O)
tSK(PP)
Max. skew
CCLKCommon
QFBDevice 1
Any QDevice 1
QFBDevice2
Any QDevice 2
Due to the statistical nature of I/O jitter a rms value (1 ) is
specified. I/O jitter numbers for other confidence factors (CF)
can be derived from Table 8.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相关PDF资料 |
PDF描述 |
|---|---|
| MPC9658 | 3.3V 1:10 LVCMOS PLL Clock Generator |
| MPF820 | JFET RF AMPLIFIER |
| MPF930 | TMOS Switching |
| MPF960 | TMOS Switching |
| MPF990 | TMOS Switching |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC961CAC | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MPC961CACR2 | 功能描述:IC BUFFER ZD 1:18 PLL 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| MPC961CFA | 功能描述:IC ZDB CMOS LV 1:18 32-LQFP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MPC961PAC | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MPC961PACR2 | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。