- 您现在的位置：买卖IC网 > PDF目录26839 > MPC9894VFR2 (INTEGRATED DEVICE TECHNOLOGY INC) 9894 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA100 PDF资料下载
参数资料
| 型号： | MPC9894VFR2 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9894 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA100 |
| 封装： | 11 X 11 MM, MAPBGA-100 |
| 文件页数： | 8/28页 |
| 文件大小： | 362K |
| 代理商： | MPC9894VFR2 |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页
Advanced Clock Drivers Devices
16
Freescale Semiconductor
MPC9894
IEEE STD.1149.1(JTAG)
This section describes the IEEE Std. 1149.1 compliant
Test Access Port (TAP) and Boundary Scan Architecture
implementation in the MPC9894. Special private instructions
are provided to assist in production test control. These
instructions combined with control of the test mode inputs
and the use of shared inputs and outputs provide for full
production test mode access and control.
Test Access Port Interface Signals
Table 29 lists the TAP interface signals and their
descriptions.
Instruction Register
Instructions
Table 31 lists the public instructions provided in the
implementation and their instruction codes. Public
instructions are accessible by the customer for board test and
may also be used for production chip test.
Boundary-Scan Register
A full description of the boundary scan register may be found in the BSDL file.
Device Identification Register (0x0281D01D)
Table 29. TAP Interface Signals
Signal Name
Description
Function
Direction
Active State
TCK
Test Clock
Test logic clock.
Input
—
TMS
Test Mode Select
TAP mode control input.
Input
—
TDI
Test Data In
Serial test instruction/data input.
Input
—
TRST_B
Test Reset Bar
Asynchronous test controller reset.
Input
—
TDO
Test Data Out
Serial test instruction/data output.
Output
—
Table 30. Instruction Register
Bit Position
43210
Field
IR
Capture-IR Value
00001
Table 31. TAP Controller Public Instructions
Instruction
Code
Enabled Serial Test Data Path
BYPASS
11111
Bypass Register
CLAMP
01100
Bypass Register
EXTEST
00000
Boundary Scan Register
HIGHZ
01001
Bypass Register
IDCODE
00001
ID Register
SAMPLE
00010
Boundary Scan Register
Table 32. Device Identification Register
Bit
Position
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Field
Version
Part Number
Manufacturer ID
Value
0
010
10
00
01
11
01
00
011
10
1
相关PDF资料 |
PDF描述 |
|---|---|
| MPC998FAR2 | PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| MPC998FA | 998 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| MPC9990FAR2 | PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| MPC9991FAR2 | PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| MPC99J93FAR2 | PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC9894VM | 制造商:IDT from Components Direct 功能描述:IDT MPC9894VM PLL - Trays 制造商:IDT 功能描述:IDT MPC9894VM PLL |
| MPC990 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:LOW VOLTAGE PLL CLOCK DRIVER |
| MPC990F18 F44A WAF | 制造商:Motorola Inc 功能描述: |
| MPC991 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:LOW VOLTAGE PLL CLOCK DRIVER |
| MPC991FA | 制造商:Motorola Inc 功能描述: |
发布紧急采购，3分钟左右您将得到回复。