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| 型号： | MSC1201Y2RHHRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC36 |
| 封装： | GREEN, PLASTIC, QFN-36 |
| 文件页数： | 20/93页 |
| 文件大小： | 1093K |
| 代理商： | MSC1201Y2RHHRG4 |
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MSC1200
MSC1201
MSC1202
SBAS317E APRIL 2004 REVISED MAY 2006
www.ti.com
27
POWER ON RESET
The on-chip Power On Reset (POR) circuitry releases the
device from reset when DVDD ≈ 2.0V. The power supply
ramp rate does not affect the POR. If the power supply falls
below 1.0V for longer than 200ms, the POR will execute.
If the power supply falls below 1.0V for less than 200ms,
unexpected operation may occur. If these conditions are
not met, the POR will not execute. For example, a negative
spike on the DVDD supply that does not remain below 1.0V
for at least 200ms, will not initiate a POR.
If the Digital Brownout Reset circuit is on, the POR circuit
has no effect.
DIGITAL BROWNOUT RESET
The Digital Brownout Reset (DBOR) is enabled through
HCR1. If the conditions for proper POR are not met, the
DBOR can be used to ensure proper device operation. The
DBOR will hold the state of the device when the power
supply drops below the threshold level programmed in
HCR1, and then generate a reset when the supply rises
above the threshold level. Note that as the device is
released from reset and program execution begins, the
device current consumption may increase, which can
result in a power supply voltage drop, which may initiate
another brownout condition. Also, the DBOR comparison
is done against an analog reference; therefore, AVDD must
be within its valid operating range for DBOR to function.
The DBOR level should be chosen to match closely with
the application.
That is, with a high external clock
frequency, the DBOR level should match the minimum
operating voltage range for the device or improper
operation may still occur.
ANALOG LOW-VOLTAGE DETECT
The MSC120x contain an analog low-voltage detect
circuit. When the analog supply drops below the value
programmed in LVDCON (SFR E7h), an interrupt is
generated, and/or the flag is set.
IDLE MODE
Idle mode is entered by setting the IDLE bit in the Power
Control register (PCON, 087h). In Idle mode, the CPU,
Timer0, Timer1, and USART are stopped, but all other
peripherals and digital pins remain active. The device can
be returned to active mode via an active internal or external
interrupt. This mode is typically used for reducing power
consumption between ADC samples.
By configuring the device prior to entering Idle mode,
further power reductions can be achieved (while in Idle
mode). These power reductions include powering down
peripherals not in use in the PDCON register (0F1h), and
reducing the system clock frequency by using the System
Clock Divider register (SYSCLK, 0C7h).
STOP MODE
Stop mode is entered by setting the STOP bit in the Power
Control register (PCON, 087h). In Stop mode, all internal
clocks are halted. This mode has the lowest power
consumption. The device can be returned to active mode
only via an external reset or power-on reset (not a
brownout reset).
By configuring the device prior to entering Stop mode,
further power reductions can be achieved (while in Stop
mode). These power reductions include halting the
external clock into the device, configuring all digital I/O
pins as open drain with low output drive, disabling the ADC
buffer, disabling the internal VREF, and setting PDCON to
0FFh to power down all peripherals.
In Stop mode, all digital pins retain their values.
POWER CONSUMPTION CONSIDERATIONS
The
following
suggestions
will
reduce
current
consumption in the MSC120x devices:
1.
Use the lowest supply voltage that will work in the
application for both AVDD and DVDD.
2.
Use the lowest clock frequency that will work in the
application.
3.
Use Idle mode and the system clock divider
whenever possible. Note that the system clock
divider also affects the ADC clock.
4.
Avoid using 8051-compatible I/O mode on the I/O
ports. The internal pull-up resistors will draw current
when the outputs are low.
5.
Use the delay line for Flash Memory control by
setting the FRCM bit in the FMCON register (SFR
EEh).
6.
Power down the internal oscillator in External Clock
mode by setting the PDICLK bit in the PDCON
register (SFR F1h).
7.
Power down peripherals when they are not needed.
Refer to SFR PDCON, LVDCON, ADCON0, and
IDAC.
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| MSC1201Y2RHHT | 功能描述:模数转换器 - ADC Precision ADC & DAC w/8051 CPU & Flash RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MSC1201Y2RHHTG4 | 功能描述:模数转换器 - ADC Precision ADC & DAC w/8051 CPU & Flash RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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| MSC1201Y3RHHR | 功能描述:模数转换器 - ADC Precision ADC & DAC w/8051 CPU & Flash RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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