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参数资料
| 型号： | MSC1201Y2RHHRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC36 |
| 封装： | GREEN, PLASTIC, QFN-36 |
| 文件页数： | 25/93页 |
| 文件大小： | 1093K |
| 代理商： | MSC1201Y2RHHRG4 |
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MSC1200
MSC1201
MSC1202
SBAS317E APRIL 2004 REVISED MAY 2006
www.ti.com
31
1) SS Asserted
2) First SCK Edge
3) CNTIF Set (dependent on CPHA bit)
4) SS Negated
SCK Cycle #
MSB
6
54
321
LSB
MSB
654
3
2
1
LSB
SlaveCPHA = 0Transfer inProgress
2
4
3
1
123
4
5
6
7
8
SlaveCPHA = 1Transfer inProgress
Sample Input
(CPHA = 0) Data Out
(CPHA = 1) Data Out
Sample Input
SS to Slave
SCK (CPOL = 0)
SCK (CPOL = 1)
Figure 18. SPI Timing Diagram
The SS pin can be used to control the output of data on
DOUT when the MSC120x is in slave mode. The SS
function is enabled or disabled by the ESS bit of the
SPICON SFR. When enabled, the SS input of a slave
device must be externally asserted before a master device
can exchange data with the slave device. SS must be low
before data transactions and must stay low for the duration
of the transaction. When SS is high, data will not be shifted
into the shift register, nor will the counter increment. When
SPI is enabled, SS also controls the drive of the line DOUT
(P1.2). When SS is low in slave mode, the DOUT pin will
be driven and when SS is high, DOUT will be high
impedance.
The SPI generates interrupt ECNT (AIE.2) to indicate that
the transfer/reception of the byte is complete. The interrupt
goes high whenever the counter value is equal to 8
(indicating that eight SCKs have occurred). The interrupt
is cleared on reading or writing to the SPIDATA register.
During the data transfer, the actual counter value can be
read from the SPICON SFR.
Power Down
The SPI is powered down by the PDSPI bit in the power
control register (PDCON). This bit needs to be cleared to
enable the SPI function. When the SPI is powered down,
pins P1.2, P1.3, P1.4, and P3.6 revert to general-purpose
I/O pins.
Application Flow
This section explains the typical application usage flow of
SPI in master and slave modes.
Master Mode Application Flow
1.
Configure the port pins.
2.
Configure the SPI.
3.
Assert SS to enable slave communication (if
applicable).
4.
Write data to SPIDATA.
5.
Generate eight SCKs.
6.
Read the received data from SPIDATA.
Slave Mode Application Flow
1.
Configure the ports pins.
2.
Enable SS (if applicable).
3.
Configure the SPI.
4.
Write data to SPIDATA.
5.
Wait for the Count Interrupt (eight SCKs).
6.
Read the data from SPIDATA.
CAUTION:
If SPIDATA is not read before the next SPI
transaction, the ECNT interrupt will be removed
and the previous data will be lost.
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相关代理商/技术参数 |
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| MSC1201Y2RHHT | 功能描述:模数转换器 - ADC Precision ADC & DAC w/8051 CPU & Flash RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MSC1201Y2RHHTG4 | 功能描述:模数转换器 - ADC Precision ADC & DAC w/8051 CPU & Flash RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MSC1201Y3 | 制造商:BB 制造商全称:BB 功能描述:Precision, Analog-to-Digital Converter (ADC) and Digital-to-Analog Converter (DAC) with 8051 Microcontroller and Flash Memory |
| MSC1201Y3RHHR | 功能描述:模数转换器 - ADC Precision ADC & DAC w/8051 CPU & Flash RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MSC1201Y3RHHRG4 | 功能描述:模数转换器 - ADC Precision ADC & DAC w/8051 CPU & Flash RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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