参数资料
型号: MSM80C85AHGS-2K
厂商: LAPIS SEMICONDUCTOR CO LTD
元件分类: 微控制器/微处理器
英文描述: 8-BIT, 5 MHz, MICROPROCESSOR, PQFP44
封装: PLASTIC, QFP-44
文件页数: 4/32页
文件大小: 355K
代理商: MSM80C85AHGS-2K
11
Semiconductor
MSM80C85AHRS/GS/JS
POWER DOWN Mode
The MSM80C85AH is compatible with the MSM80C85A in function and POWER DOWN mode.
This reduces power consumption further.
There are two methods available for starting this POWER DOWN mode. One is through
software control by using the HALT command and the other is under hardware control by using
the pin HOLD. This mode is released by the HOLD, RESET, and interrupt pins (TRAP, RST7.5,
RST6.5 RST5.5, or INTR). (See Table 4.)
Since the sequence of HALT, HOLD, RESET, and INTERRUPT is compatible with MSM80C85A,
every the POWER DOWN mode can be used with no special attention.
Start by means of Halt command
Start by means of HOLD pin
Released by using pins RESET and INTERRUPT (not by pin HOLD)
Released by using RESET and HOLD pins (not by interrupt pins)
Table 4 POWER DOWN Mode Releasing Method
(1) Start by means of HALT command (See Figures 6 and 7.)
The POWER DOWN mode can be started by executing the HALT command.
At this time, the system is put into the HOLD status and therefore the POWER DOWN mode
cannot be released even when the HOLD is released later.
In this case, the POWER DOWN mode can be released by means of the RESET or interrupt.
(2) Start by means of HOLD pin (See Figure 8.)
During the execution of commands other than the HALT, the POWER DOWN mode is started
when the system is put into HOLD status by means of the HOLD pin.
Since no interrupt works during the execution of the HOLD, the POWER DOWN mode cannot
be released by means of interrupt pins. In this case, the POWER DOWN mode can be released
either by means of the RESET pin or by releasing the HOLD status by means of HOLD pin.
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