- 您现在的位置：买卖IC网 > PDF目录385639 > MT46V32M4TG-75 (Micron Technology, Inc.) DOUBLE DATA RATE DDR SDRAM PDF资料下载
参数资料
| 型号： | MT46V32M4TG-75 |
| 厂商： | Micron Technology, Inc. |
| 英文描述： | DOUBLE DATA RATE DDR SDRAM |
| 中文描述： | 双倍数据速率的DDR SDRAM内存 |
| 文件页数： | 13/68页 |
| 文件大小： | 2547K |
| 代理商： | MT46V32M4TG-75 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页当前第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页
13
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65
–
Rev. C; Pub. 4/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
128Mb: x4, x8, x16
DDR SDRAM
PRELIMINARY
appear following the Operation section; these tables
provide current state/next state information.
Commands
Truth Table 1 provides a quick reference of avail-
able commands. This is followed by a verbal descrip-
tion of each command. Two additional Truth Tables
NOTE:
1. CKE is HIGH for all commands shown except SELF REFRESH.
2. BA0-BA1 select either the mode register or the extended mode register (BA0 = 0, BA1 = 0 select the mode register;
BA0 = 1, BA1 = 0 select extended mode register; other combinations of BA0-BA1 are reserved). A0-A11 provide the
op-code to be written to the selected mode register.
3. BA0-BA1 provide bank address and A0-A11 provide row address.
4. BA0-BA1 provide bank address; A0-A
i
provide column address (where
i
= 8 for x16, 9 for x8, and 9, 11 for x4); A10 HIGH
enables the auto precharge feature (nonpersistent), and A10 LOW disables the auto precharge feature.
5. A10 LOW: BA0-BA1 determine which bank is precharged.
A10 HIGH: all banks are precharged and BA0-BA1 are
“
Don
’
t Care.
”
6. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing; all inputs and I/Os are
“
Don
’
t Care
”
except for CKE.
8. Applies only to read bursts with auto precharge disabled; this command is undefined (and should not be used) for READ
bursts with auto precharge enabled and for WRITE bursts.
9. DESELECT and NOP are functionally interchangeable.
10. Used to mask write data; provided coincident with the corresponding data.
TRUTH TABLE 1
–
COMMANDS
(Note: 1)
NAME (FUNCTION)
DESELECT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
READ (Select bank and column, and start READ burst)
WRITE (Select bank and column, and start WRITE burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
LOAD MODE REGISTER
CS# RAS#CAS# WE#
H
X
L
H
L
L
L
H
L
H
L
H
L
L
L
L
ADDR
X
X
Bank/Row
Bank/Col
Bank/Col
X
Code
X
NOTES
9
9
3
4
4
8
5
6, 7
X
H
H
L
L
H
H
L
X
H
H
H
L
L
L
H
L
L
L
L
Op-Code
2
TRUTH TABLE 1A
–
DM OPERATION
NAME (FUNCTION)
Write Enable
Write Inhibit
DM
L
H
DQs
Valid
X
NOTES
10
10
相关PDF资料 |
PDF描述 |
|---|---|
| MT46V32M4TG-75L | DOUBLE DATA RATE DDR SDRAM |
| MT46V32M4TG-75Z | DOUBLE DATA RATE DDR SDRAM |
| MT46V32M4TG-75ZL | DOUBLE DATA RATE DDR SDRAM |
| MT46V32M4TG-8 | DOUBLE DATA RATE DDR SDRAM |
| MT46V32M4TG-8L | DOUBLE DATA RATE DDR SDRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MT46V32M4TG-75L | 制造商:MICRON 制造商全称:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM |
| MT46V32M4TG-75Z | 制造商:MICRON 制造商全称:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM |
| MT46V32M4TG-75ZL | 制造商:MICRON 制造商全称:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM |
发布紧急采购，3分钟左右您将得到回复。