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128Mbx16x32Mobile_2.fm - Rev. L 10/07 EN
27
2001 Micron Technology, Inc. All rights reserved.
128Mb: x16, x32 Mobile SDRAM
READs
Upon completion of a burst, assuming no other commands have been initiated, the DQ
will go High-Z. A full-page burst will continue until terminated. (At the end of the page, it
will wrap to column 0 and continue.)
Data from any READ burst may be truncated with a subsequent READ command, and
data from a fixed-length READ burst may be immediately followed by data from a READ
command. In either case, a continuous flow of data can be maintained. The first data
element from the new burst either follows the last element of a completed burst or the
last desired data element of a longer burst that is being truncated. The new READ
command should be issued x cycles before the clock edge at which the last desired data
element is valid, where x = CL - 1.
Figure 13:
CAS Latency
the last of a burst of four or the last desired of a longer burst. The 128Mb SDRAM uses a
pipelined architecture and, therefore, does not require the 2n rule associated with a
prefetch architecture. A READ command can be initiated on any clock cycle following a
previous READ command. Full-speed random read accesses can be performed to the
performed to a different bank.
CLK
DQ
T2
T1
T3
T0
CL = 3
LZ
DOUT
tOH
t
COMMAND
NOP
READ
tAC
NOP
T4
NOP
DON’T CARE
UNDEFINED
CLK
DQ
T2
T1
T0
CL = 1
LZ
DOUT
tOH
t
COMMAND
NOP
READ
tAC
CLK
DQ
T2
T1
T3
T0
CL = 2
LZ
DOUT
tOH
t
COMMAND
NOP
READ
tAC
NOP