参数资料
型号: MTP10N10E
厂商: MOTOROLA INC
元件分类: JFETs
英文描述: TMOS POWER FETs 10 AMPERES 100 VOLTS RDS(on) = 0.25 OHM
中文描述: 10 A, 100 V, 0.25 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
文件页数: 5/8页
文件大小: 237K
代理商: MTP10N10E
Figure 12. Commutating Safe Operating Area (CSOA)
0
20
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
40
60
80
30
25
20
15
0
10
+
+
Figure 13. Commutating Safe Operating Area
Test Circuit
VR
VGS
IFM
20 V
RGS
DUT
IS
Li
VR = 80% OF RATED VDS
VdsL = Vf + Li
dls/dt
dIs/dt
400 A/
μ
s
100
120
I
5
Figure 14. Unclamped Inductive Switching
Test Circuit
Figure 15. Unclamped Inductive Switching
Waveforms
t
L
VDS
ID
VDD
tP
V(BR)DSS
VDD
ID(t)
C
4700
μ
F
250 V
RGS
50
IO
Vds(t)
t, (TIME)
WDSR
1
2
L IO2
V(BR)DSS
V(BR)DSS– VDD
VDS
5
Motorola TMOS Power MOSFET Transistor Device Data
COMMUTATING SAFE OPERATING AREA (CSOA)
The Commutating Safe Operating Area (CSOA) of Figure
12 defines the limits of safe operation for commutated
source-drain current versus re-applied drain voltage when
the source-drain diode has undergone forward bias. The
curve shows the limitations of IFM and peak VDS for a given
rate of change of source current. It is applicable when wave-
forms similar to those of Figure 11 are present. Full or half-
bridge PWM DC motor controllers are common applications
requiring CSOA data.
Device stresses increase with increasing rate of change of
source current so dIs/dt is specified with a maximum value.
Higher values of dIs/dt require an appropriate derating of IFM,
peak VDS or both. Ultimately dIs/dt is limited primarily by de-
vice, package, and circuit impedances. Maximum device
stress occurs during trr as the diode goes from conduction to
reverse blocking.
VDS(pk) is the peak drain–to–source voltage that the device
must sustain during commutation; IFM is the maximum for-
ward source-drain diode current just prior to the onset of
commutation.
VR is specified at 80% of V(BR)DSS to ensure that the
CSOA stress is maximized as IS decays from IRM to zero.
RGS should be minimized during commutation. TJ has only
a second order effect on CSOA.
Stray inductances in Motorola’s test circuit are assumed to
be practical minimums. dVDS/dt in excess of 10 V/ns was at-
tained with dIs/dt of 400 A/
μ
s.
Figure 11. Commutating Waveforms
15 V
VGS
0
90%
IFM
dls/dt
IS
10%
trr
IRM
ton
VDS
Vf
VdsL
dVDS/dt
VDS(pk)
MAX. CSOA
STRESS AREA
VR
0.25 IRM
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