参数资料
型号: NCN8024DWR2G
厂商: ON Semiconductor
文件页数: 5/16页
文件大小: 0K
描述: IC SMART CARD IC2 28SOIC
标准包装: 1,000
应用: 智能卡读取器,写入器
电源电压: 5V
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 带卷 (TR)
安装类型: 表面贴装
其它名称: NCN8024DWR2G-ND
NCN8024DWR2GOSTR
NCN8024
http://onsemi.com
13
POWERDOWN
When the communication session is completed the
NCN8024 runs a deactivation sequence by setting High
CMDVCC. The below power down sequence is executed:
CRD_RST is forced to Low
CRD_CLK is set Low 12 ms after CRD_RST.
CRD_IO, CRD_AUX1 and CRD_AUX2 are pulled Low
Finally CRD_VCC supply can be shutoff.
Figure 6. Deactivation Sequence
CRD_RST
CRD_IO
CRD_CLK
CMDVCC
CRD_VCC
tdeact
FAULT DETECTION
In order to protect both the interface and the external smart
card, the NCN8024 provides security features to prevent
failures or damages as depicted here after.
Card extraction detection
VDD under voltage detection
Shortcircuit or overload on CRD_VCC
Card pin current limitation: in the case of a short circuit
to ground. No feedback is provided to the external MPU.
DC/DC operation: the internal circuit continuously
senses the CRD_VCC voltage (in the case of either over
or under voltage situation).
DC/DC operation: undervoltage detection on VDDP or
overload on VUP
Overheating
Figure 7. Fault Detection and Interrupt Management
Debounce
Powerdown Caused by
ShortCircuit
Powerdown Resulting of
Card Extraction
INT
CRD_VCC
CRD_PRES
CMDVCC
Interrupt Pin Management:
A card session is opened by toggling CMDVCC High to
Low.
Before a card session, CMDVCC is supposed to be in a
High position. INT is Low if no card is present in the card
connector (Normally open or normally closed type). INT is
High if a card is present. If a card is inserted (INT = High)
and if VDD drops below the UVLO threshold then INT pin
drops Low immediately. It turns back High when VDD
increases again over the UVLO limit (including hysteresis),
a card being still present.
During a card session, CMDVCC is Low and INT pin
goes Low when a fault is detected. In that case a deactivation
is immediately and automatically performed (see Figure 6).
When the microcontroller resets CMDVCC to High it can
sense the INT level again after having got completed the
deactivation.
As illustrated by Figure 7 the device has a debounce timer
of 8 ms typical duration. When a card is inserted, output INT
goes High only at the end of the debounce time. When the
card is removed a deactivation sequence is automatically
and immediately performed and INT goes Low.
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