参数资料
| 型号： | NCP1308DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 12/16页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBACK PWM 8-SOIC |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 75kHz |
| 电源电压： | 11 V ~ 20 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP1308DR2GOSCT |
NCP1308
V CC
REGULATION
OCCURS HERE
12 V
LATCHOFF
10 V
PHASE
5.3 V
TIME
DRV
INTERNAL
FAULT FLAG
DRIVER
PULSES
FAULT IS
TIME
If the fault is relaxed during the V CC
natural fall down sequence, the IC
automatically resumes.
If the fault still persists when V CC
reached VCC ON , then the controller
cuts everything off until recovery.
RELAXED
TIME
STARTUP PHASE
FAULT OCCURS HERE
Figure 22.
the following formula: D t + D V @ C , with Δ V = 2 V. Then
Soft-Start
The NCP1308 features an internal 1ms soft-start to
soften the constraints occurring in the power supply during
startup. It is activated during the power on sequence. As
soon as V CC reaches VCC OFF , the peak current is gradually
increased from nearly zero up to the maximum clamping
level (e.g. 1.0 V). The soft-start is also activated during the
over current burst (OCP) sequence. Every restart attempt
is followed by a soft-start activation. Generally speaking,
the soft-start will be activated when V CC ramps up either
from zero (fresh power-on sequence) or 5.3 V, the latchoff
voltage occurring during OCP.
Calculating the V CC Capacitor
As the above section describes, the fall down sequence
depends upon the V CC level: how long does it take for the
V CC line to go from 12 V to 10 V? The required time
depends on the startup sequence of your system, i.e. when
you first apply the power to the IC. The corresponding
must be less than the time needed to discharge from 12 V
to 10 V, otherwise the supply will not properly start. The
test consists in either simulating or measuring in the lab
how much time the system takes to reach the regulation at
full load. Let's suppose that this time corresponds to 6ms.
Therefore a V CC fall time of 10 ms could be well
appropriated in order to not trigger the overload detection
circuitry. If the corresponding IC consumption, including
the MOSFET drive, establishes at 1.6 mA (e.g. with a
10 nC Qg), we can calculate the required capacitor using
i
for a wanted Δ t of 10 ms, C equals 9 m F or 22 m F for a
standard value. When an overload condition occurs, the IC
blocks its internal circuitry and its consumption drops to
330 m A typical. This happens at V CC = 10 V and it remains
stuck until V CC reaches 5.3 V: we are in latchoff phase.
Again, using the calculated 22 m F and 330 m A current
consumption, this latchoff phase lasts: 313 ms.
transient fault duration due to the output capacitor charging
http://onsemi.com
12
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| NCP1316 | 制造商:未知厂家 制造商全称:未知厂家 功能描述: |
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