参数资料
| 型号： | NCP1381DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/25页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBK ISO CM 14SOIC |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 125kHz |
| 电源电压： | 11 V ~ 20 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | 0°C ~ 125°C |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP1381DR2GOSCT |
NCP1381, NCP1382
Figure 5. A Typical Startup Sequence Followed by a Faulty Condition
Startup Resistor Calculation
For the sake of the example, we will go through the
calculation of the startup element. Suppose that we have the
following information:
VCC ON = 15 V.
VCC OFF = 10 V.
I CC2 = 4 mA, given by the selected MOSFET Q g .
Startup duration below 2 s at minimum input voltage.
Input voltage from 85 VAC to 265 VAC.
Standby power below 500 mW.
1. From a startup Δ V of 15 -- 10 = 5 V and a 4 mA
total consumption, we can obtain the necessary
V CC capacitor to keep enough voltage, assuming
the feedback loop is closed within 10ms: CV CC =
4 m x 10 m / 5 = 8 m F or 22 m F for the normalized
value if we account for the natural dispersion.
above: I charge > 15 x 22 u / 2 > 165 m A. If we add
the 15 m A of I CC1 , the total startup current shall be
above 180 m A.
3. The minimum input voltage is 85 x 1.414 = 120 V.
Then, R startup should be below (120 -- 15) / 180 m
< 580 k Ω .
4. From this value, we can calculate the dissipated
power at high line: P startup = (265 x 1.414) 2 / 580 k
= 242 mW.
In latched mode, an internal zener diode is activated and
clamps V CC to around 6 V. When V CC goes below 4 V, this
zener is relaxed and the circuit can startup again.
Please note that in fault mode the V CC comparator has the
priority and stops the pulses anytime V CC falls below its
minimum operating level VCC OFF .
2. If we want a startup below 2 s, then the charging
current flowing inside the V CC capacitor must be
http://onsemi.com
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