参数资料
| 型号： | NCP1571DG |
| 厂商： | ON Semiconductor |
| 文件页数： | 10/16页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 8-SOIC |
| 产品变化通告： | Product Obsolescence 05/Oct/2010 |
| 标准包装： | 98 |
| PWM 型： | 电流/电压模式，V²? |
| 输出数： | 1 |
| 频率 - 最大： | 250kHz |
| 电源电压： | 11.4 V ~ 12.6 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 管件 |
NCP1571
8.5 V
0.5 V
V IN
V COMP
V FB
GATE(H)
output voltage, preventing damage to the load. The regulator
remains in this state until the overvoltage condition ceases.
Power Good
The PWRGD pin is asserted when the output voltage is
within regulation limits. Sensing for the PWRGD pin is
achieved through the V FB pin. When the output voltage is
rising, PWRGD goes high at 90% of the designed output
voltage. When the output voltage is falling, PWRGD goes
low at 70% of the designed output voltage. PWRGD is an
UVLO
STARTUP
t S
NORMAL OPERATION
open?collector output and should be externally pulled to
logic high through a resistor to limit current to no more than
Figure 22. Idealized Waveforms
Normal Operation
During normal operation, the duty cycle of the gate drivers
remains approximately constant as the V 2 control loop
maintains the regulated output voltage under steady state
conditions. Variations in supply line or output load conditions
will result in changes in duty cycle to maintain regulation.
Input Supplies
The NCP1571 can be used in applications where a 12 V
supply is available along with a lower voltage supply. Often
the lower voltage supply is 5 V, but it can be any voltage less
than the 12 V supply minus the required gate drive voltage
of the top MOSFET. The greater the difference between the
two voltages, the better the efficiency due to increasing V GS
available to turn on the upper MOSFET. In order to maintain
power supply stability, the lower supply voltage should be
at least 1.5 times the desired voltage.
A lower supply voltage between 2?7 V is recommended.
Gate Charge Effect on Switching Times
When using the onboard gate drivers, the gate charge has
an important effect on the switching times of the FETs. A
finite amount of time is required to charge the effective
capacitor seen at the gate of the FET. Therefore, the rise and
fall times rise linearly with increased capacitive loading.
Transient Response
The 200 ns reaction time of the control loop provides fast
transient response to any variations in input voltage and
output current. Pulse?by?pulse adjustment of duty cycle is
provided to quickly ramp the inductor current to the required
level. Since the inductor current cannot be changed
instantaneously, regulation is maintained by the output
capacitors during the time required to slew the inductor
current. For better transient response, several high
frequency and bulk output capacitors are usually used.
Overvoltage Protection
Overvoltage protection is provided as a result of the
normal operation of the V 2 control method and requires no
additional external components. The control loop responds
to an overvoltage condition within 200 ns, turning off the
20 mA. Figure 23 shows the hysteretic nature of the
PWRGD pin’s operation.
PWRGD
High
Low
V OUT
70% 90%
Percent of
Designed V OUT
Figure 23. PWRGD Assertion
Shutdown
When the input voltage connected to V CC falls through the
lower threshold of the UVLO comparator, a fault latch is set.
The fault latch provides a signal that forces both GATE(H)
and GATE(L) into their logic low state, producing a
high?impedance output at the converter switch node. At the
same time, the latch also turns on two transistors which pull
down on the COMP and PGDELAY pins, quickly
discharging their external capacitors, and allowing PWRGD
to fall.
CONVERTER DESIGN
Selection of the Output Capacitors
These components must be selected and placed carefully
to yield optimal results. Capacitors should be chosen to
provide acceptable ripple on the regulator output voltage.
Key specifications for output capacitors are their ESR
Equivalent Series Resistance (ESR), and Equivalent Series
Inductance (ESL). For best transient response, a
combination of low value/high frequency and bulk
capacitors placed close to the load will be required.
In order to determine the number of output capacitors the
maximum voltage transient allowed during load transitions
has to be specified. The output capacitors must hold the
output voltage within these limits since the inductor current
upper MOSFET and disconnecting the regulator from its
input voltage. This results in a crowbar action to clamp the
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP1571DR2 | 功能描述:DC/DC 开关控制器 Low Voltage RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| NCP1571DR2G | 功能描述:DC/DC 开关控制器 Low Voltage Synchronous Buck RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| NCP1573D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| NCP1573DR2 | 功能描述:IC REG CTRLR BUCK PWM 8-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,000 系列:- PWM 型:电压模式 输出数:1 频率 - 最大:1.5MHz 占空比:66.7% 电源电压:4.75 V ~ 5.25 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:40-VFQFN 裸露焊盘 包装:带卷 (TR) |
| NCP1575D | 功能描述:DC/DC 开关控制器 Low Voltage RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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