参数资料
型号: NCP1571DG
厂商: ON Semiconductor
文件页数: 4/16页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 8-SOIC
产品变化通告: Product Obsolescence 05/Oct/2010
标准包装: 98
PWM 型: 电流/电压模式,V²?
输出数: 1
频率 - 最大: 250kHz
电源电压: 11.4 V ~ 12.6 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 管件
NCP1571
ELECTRICAL CHARACTERISTICS (continued) (0 ° C < T J < 125 ° C, 11.4 V < V CC < 12.6 V, C GATE(H) = C GATE(L) = 3.3 nF,
C PGDELAY = 0.01 m F, C COMP = 0.1 m F; unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Power Good
Delay Discharge Threshold to Reset UVLO
PGDELAY = 0.5 V, V CC = 12 V to 6.9 to 12
0.1
0.25
0.3
V
V, Ramp PGDELAY to 0.1 V, Monitor I
(PGDELAY)
“Good” Signal Delay
With 0.01 m F. Note 3
1.0
3.0
5.0
ms
PWM Comparator
PWM Comparator Offset
V FB = 0 V, Increase COMP Until GATE(H)
0.475
0.525
0.575
V
Starts Switching
Ramp Max Duty Cycle
Artificial Ramp
Transient Response
V FB Input Range
?
Duty Cycle = 50%
COMP = 1.5 V, V FB 20 mV Overdrive. Note 3
Note 3
?
18
?
0
80
25
200
?
?
35
300
1.4
%
mV
ns
V
Oscillator
Switching Frequency
?
150
200
250
kHz
General Electrical Specifications
V CC Supply Current
Start Threshold
Stop Threshold
Hysteresis
COMP = 0 V (No Switching)
GATE(H) Switching, COMP Charging
GATE(H) Not Switching, COMP Discharging
Start ? Stop
?
8.0
7.0
0.75
10
8.5
7.5
1.0
15
9.0
8.0
1.25
mA
V
V
V
3. Guaranteed by design. Not tested in production.
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
1
2
3
4
5
6
7
8
PIN SYMBOL
V CC
PWRGD
PGDELAY
COMP
GATE(H)
GATE(L)
V FB
GND
FUNCTION
Power supply input.
Open collector output goes low when V FB is out of regulation. User must externally
limit current into this pin to less than 20 mA.
External capacitor programs PWRGD low?to?high transition delay.
Error amp output. PWM comparator reference input. A capacitor to LGND provides
error amp compensation and Soft?Start. Pulling pin < 0.475 V locks gate outputs to a
zero percent duty cycle state.
High?side switch FET driver pin. Capable of delivering peak currents of 1.5 A.
Low?side synchronous FET driver pin. Capable of delivering peak currents of 1.5 A.
Error amplifier and PWM comparator input.
Power supply return.
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