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参数资料
| 型号： | NCP1652L48VGEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 27/34页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL 100W 48V NCP1652 PFC |
| 产品变化通告： | 1Q2012 Discontinuation 30/Mar/2012 |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | NCP1652L48VGEVB-ND NCP1652L48VGEVBOS |
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NCP1652, NCP1652A
Output Overload
The Feedback Voltage, V FB , is directly proportional to the
output power of the converter. An internal 6.7 k W resistor
pulls ? up the FB voltage to the internal 6.5 V reference. An
external optocoupler pulls down the FB voltage to regulate
the output voltage of the system. The optocoupler is off
during power up and output overload conditions allowing
the FB voltage to reach its maximum level.
The NCP1652 monitors the FB voltage to detect an
overload condition. A typical startup time of a single PFC
stage converter is around 100 ms. If the converter is out of
regulation (FB voltage exceeds 5.0 V) for more that 150 ms
(typical) the drivers are disabled and the controller enters the
double hiccup mode to reduce the average power
dissipation. A new startup sequence is initiated after the
double hiccup is complete. This protection feature is critical
to reduce power during an output short condition.
Soft ? Skip ? Cycle Mode
The FB voltage reduces as the output power demand of the
260 mV. A new Soft ? Skip ? period starts once the voltage
on the AC ? IN pin increases to 260 mV.
An increase in output load current terminates a
Soft ? Skip ? event. A transient load detector terminates a
Soft ? Skip ? period once V FB voltage exceeds V SSKIP by
more than 550 mV. This ensures the required output power
is delivered during a load transient and the output voltage
does not fall out of regulation. Figure 66 shows the
relationship between Soft ? Skip ? and the transient load
detector.
converter reduces. Once V FB drops below the skip
threshold, V SSKIP , 1.30 V (typical) the drivers are disabled.
The skip comparator hysteresis is typically 180 mV.
The converter output voltage starts to decay because no
additional output power is delivered. As the output voltage
decreases the feedback voltage increases to maintain the
output voltage in regulation. This mode of operation is
known as skip mode. The skip mode frequency is dependent
V FB
V SSKIP
of load loop gain and output capacitance and can create
audible noise due to mechanical resonance in the
transformer and snubber capacitor. A proprietary
Soft ? Skip ? mode reduces audible noise by slowly
increasing the primary peak current until it reaches its
maximum value. The minimum skip ramp period, t SSKIP , is
2.5 ms. Figure 65 shows the relationship between V FB ,
V SSKIP and the primary current.
Figure 65. Soft ? Skip ] operation.
Skip mode operation is synchronous of the ac line voltage.
The NCP1652 disables Soft ? Skip ? when the rectified ac
line voltage drops to its valley level. This ensures the
primary current always ramp up reducing audible noise. A
skip event occurring as the ac line voltage is decreasing,
causes the primary peak current to ramp down instead of
ramp up. Once the skip period is over the primary current is
only determined by the ac line voltage. A Soft ? Skip ? event
terminates once the AC ? IN pin voltage decreases below
Figure 66. Load transient during Soft ? Skip ]
The output of the Soft ? Skip ? Comparator is or ? ed with
the PWM Comparator output to control the duty ratio. The
Soft ? Skip ? Comparator controls the duty ratio in skip
mode and the PWM Comparator controls the duty cycle
during normal operation. In skip mode, the non ? inverting
input of the Soft ? Skip ? Comparator exceeds 4 V, disabling
the drivers. As the FB voltage increases, the voltage at the
non ? inverting input is ramp down from 4 V to 0.2 V to
enable the drivers.
Multiplier and Reference Generator
The NCP1652 uses a multiplier to regulate the average
output power of the converter. This controller uses a
proprietary concept for the multiplier used within the
reference generator. This innovative design allows greatly
improved accuracy compared to a conventional linear
analog multiplier. The multiplier uses a PWM switching
circuit to create a scalable output signal, with a very well
defined gain.
The output of the multiplier is the ac-reference signal. The
ac-reference signal is used to shape the input current. The
multiplier has three inputs, the error signal from an external
error amplifier (V FB ), the full wave rectified ac input
(AC_IN) and the feedforward input (V FF ).
The FB signal from an external error amplifier circuit is
applied to the V FB pin via an optocoupler or other isolation
circuit. The FB voltage is converted to a current with a V-I
http://onsemi.com
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