参数资料
型号: NCP4326DR2G
厂商: ON Semiconductor
文件页数: 19/29页
文件大小: 0K
描述: IC SECONDARY CTLR SW PS 16-SOIC
产品变化通告: Discontinuation 30/Jun/2006
标准包装: 2,500
应用: 次级控制器,准谐振切换模式电源
输入电压: 15V
输出数: 3
工作温度: 0°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
NCP4326
Duty Cycle Control:
Figure 41 shows the duty cycle value according the opamp
FB Voltage on pin CPx
output voltage (CPx pin):
1. If the opamp output (V CPx ) is above the maximum
ramp value (V Ct_max1 ) on “Ct” pin then the duty
cycle will be equal to 100%.
2. If V CPx is between the max and the min value of
the ramp voltage, respectively V Ct_max1 and
V Ct_min1 then the duty cycle will be included
between 0 and 100%.
3. If V CPx is below the min ramp value (V Ct_min1 )
then the output driver will be place in skip cycle
mode with a null duty cycle.
Duty Cycle = 100%
0% < Duty Cycle < 100%
Duty Cycle = 0%
V OH1, 2min
V Ct_max1
V Ct_min
V Cpx
Time
Figure 41. Duty Cycle Variation versus the
Feedback Voltage
Here after find the experimental results illustrating the skip cycle feature:
0% DC
100%
Duty Cycle
0% DC
DRV2 pin Signal
(10 V/div)
Ct ramp pin signal
(1 V/div)
Variable
Duty Cycle
Figure 42. All Duty Cycle Representation
http://onsemi.com
19
Error amplifier
output voltage (CP2
pin) (1 V/div).
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