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参数资料
| 型号： | NCP4331DBR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 18/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16-TSSOP |
| 产品变化通告： | Product Obsolescence 19/Dec/2008 |
| 标准包装： | 2,500 |
| PWM 型： | 控制器 |
| 输出数： | 2 |
| 频率 - 最大： | 400kHz |
| 电源电压： | 最高 30V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 带卷 (TR) |
NCP4331
VIN_FORWARD
V in
V out1
+
LOAD1
Regulation
Block
VCC
Forward
Driver
1 CSout
VCC 16
R OVP1
(e.g.
NCP1280)
CSin-
2 CSin-
BST 15
CS in -
FB
3 CSin+
4 UVP
HS_ DRV 14
HB 13
L
R OVP2
V out2
FB
5 COMP
VDD 12
R S
(Coil Series Res‐
6 FB
7 SS
LS_ DRV 11
GND 10
istor)
+ LOAD2
R sync
8 Cramp
SYNC
9
FB
Figure 26. “Basic” Configuration Further Including an Overvoltage Protection (OVP)
Compared to the “basic” configuration, Figure 26 further includes an OVP feature that utilizes the auxiliary operational
amplifier (OPAMP2). Two resistors R ovp1 and R ovp2 scale down the output voltage and the resulting portion of V out2 is applied
to the inverting input of OPAMP2. The non inverting input receives the feedback signal that nominally equates the internal
reference voltage (V REF ). Hence, V REF also serves as the OVP reference. R ovp1 and R ovp2 must be dimensioned so that
OPAMP2 “triggers” when V out2 exceeds its maximum acceptable level. The output of OPAMP2 (“CSout” that is SINK only)
is connected to the COMP pin to reduce the duty-cycle in case of OVP. CSout can be connected to the soft-start pin if a low
duty-cycle re-start-up is preferred after an OVP event. It can be noted that both options offer a protection if the feedback is
accidentally grounded since in this case, the pin6 voltage and hence, the OVP threshold are close to zero. Ultimately, the
post-regulator is protected in this fault condition.
http://onsemi.com
18
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