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| 型号： | NCP5424DG |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/18页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16-SOIC |
| 产品变化通告： | Product Obsolescence 21/Jan/2010 |
| 标准包装： | 48 |
| PWM 型： | 电流/电压模式，V²? |
| 输出数： | 1 |
| 频率 - 最大： | 750kHz |
| 占空比： | 100% |
| 电源电压： | 10.8 V ~ 13.2 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 包装： | 管件 |
NCP5424
commonly used. Powdered iron cores are very suitable due
to its high saturation flux density and have low loss at high
IL(VALLEY) + IOUT *
D IL
2
(VIN(MIN) * VOUT)VOUT
LMIN +
D IL + OUT
D VOUT + D IOUT ESL ) ESR ) tTR
D VOUT
D IL +
D VOUT
D IL
frequencies, a distributed gap and exhibit very low EMI.
The minimum value of inductance which prevents
inductor saturation or exceeding the rated FET current can
be calculated as follows:
fSW VIN(MIN) ISW(MAX)
where:
L MIN = minimum inductance value;
V IN(MIN) = minimum design input voltage;
V OUT = output voltage;
f SW = switching frequency;
I SW(MAX) ? maximum design switch current.
The inductor ripple current can then be determined:
V (1 * D)
L fSW
where:
D I L = inductor ripple current;
V OUT = output voltage;
L = inductor value;
D = duty cycle.
f SW = switching frequency
The designer can now verify if the number of output
capacitors will provide an acceptable output voltage ripple
(1.0% of output voltage is common). The formula below is
used:
ESRMAX
Rearranging we have:
ESRMAX +
where:
ESR MAX = maximum allowable ESR;
D V OUT = 1.0% × V OUT = maximum allowable output
voltage ripple ( budgeted by the designer );
D I L = inductor ripple current;
V OUT = output voltage.
where:
I L(VALLEY) = inductor valley current.
Selection of the Output Capacitors
These components must be selected and placed carefully
to yield optimal results. Capacitors should be chosen to
provide acceptable ripple on the regulator output voltage.
Key specifications for output capacitors are their ESR
(Equivalent Series Resistance), and ESL (Equivalent Series
Inductance). For best transient response, a combination of
low value/high frequency and bulk capacitors placed close
to the load will be required.
In order to determine the number of output capacitors the
maximum voltage transient allowed during load transitions
has to be specified. The output capacitors must hold the
output voltage within these limits since the inductor current
can not change with the required slew rate. The output
capacitors must therefore have a very low ESL and ESR.
The voltage change during the load current transient is:
D t COUT
where:
D I OUT / D t = load current slew rate;
D I OUT = load transient;
D t = load transient duration time;
ESL = Maximum allowable ESL including capacitors,
circuit traces, and vias;
ESR = Maximum allowable ESR including capacitors
and circuit traces;
t TR = output voltage transient response time.
The designer has to independently assign values for the
change in output voltage due to ESR, ESL, and output
capacitor discharging or charging. Empirical data indicates
that most of the output voltage change (droop or spike
depending on the load current transition) results from the
total output capacitor ESR.
The maximum allowable ESR can then be determined
according to the formula:
Number of capacitors +
The number of output capacitors is determined by:
ESRCAP
ESRMAX
where:
ESRMAX +
D VESR
D IOUT
where:
ESR CAP = maximum ESR per capacitor (specified in
manufacturer ’s data sheet).
The designer must also verify that the inductor value
yields reasonable inductor peak and valley currents (the
D V ESR = change in output voltage due to ESR (assigned
by the designer)
Once the maximum allowable ESR is determined, the
number of output capacitors can be found by using the
formula:
IL(PEAK) + IOUT )
inductor current is a triangular waveform):
D IL
2
where:
Number of capacitors +
ESRCAP
ESRMAX
where:
I L(PEAK) = inductor peak current;
I OUT = load current;
D I L = inductor ripple current.
ESR CAP = maximum ESR per capacitor (specified in
manufacturer ’s data sheet).
ESR MAX = maximum allowable ESR.
http://onsemi.com
11
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