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参数资料
| 型号： | NTE7134 |
| 厂商： | NTE Electronics, Inc. |
| 英文描述： | Integrated Circuit Horizontal and Vertical Deflection Controller for Monitors |
| 中文描述： | 集成电路水平和垂直偏转控制器监视器 |
| 文件页数： | 11/17页 |
| 文件大小： | 89K |
| 代理商： | NTE7134 |
Functional Description (Cont
’
d):
Frequency
–
Locked Loop
The frequency
–
locked loop can lock the horizontal oscillator over a wide frequency range. This is
achieved by a combined search and PLL operation. The frequency range is preset by two external
f
min
f
max
Larger ranges are possible by extended applications.
Without a horizontal sync signal the oscillator will be free
–
running at f
min
. Any change of sync condi-
tions is detected by the internal coincidence detector. A deviation of more than 4% between horizontal
sync and oscillator frequency switches the horizontal section into search mode. This means that PLL1
control currents are switched off immediately. Then the internal frequency detector starts tuning the
oscillator. Very small DC currents at HPLL1 (Pin26) are used to perform this tuning with a well defined
change rate. When coincidence between horizontal sync and oscillator frequency is detected, the
search mode is replaced by a normal PLL operation. This operation ensures a smooth tuning and
avoids fast changes of horizontal frequency during catching.
In this concept it is not allowed to load HPLL1. The frequency dependent voltage at this pin is fed inter-
nally to HBUF (Pin27) via a sample
–
and
–
hold and buffer stage. The sample
–
and
–
hold stage re-
moves all disturbances caused by horizontal sync or composite vertical sync from the buffered volt-
age. An external resistor from HBUF to HREF defines the frequency range.
See also hints for locking procedure in Note 2 of the
“
Electrical Characteristics
”
section of this data
sheet.
P
LL1
Phase Detector
The phase detector is a standard type using switched current sources. The middle of the horizontal
sync is compared with a fixed point of the oscillator sawtooth voltage. The PLL1 loop filter is connected
to HPLL (Pin26).
Horizontal Oscillator
This oscillator is a relaxation type and requires a fixed capacitor of 10nF at HCAP (Pin29). For opti-
mum jitter performance the value of 10nF must not be changed.
The maximum oscillator frequency is determined by a resistor from HREF to GND. A resistor from
HREF to HBUF defines the frequency range.
The reference current at HREF also defines the integration time constant of the vertical sync integration.
Calculation of Line Frequency Range
First the oscillator frequencies f
min
and f
max
have to be calculated. This is achieved by adding the
spread of the relevant components to the highest and lowest sync frequencies f
S(min)
and f
S(max)
. The
oscillator is driven by the difference of the currents in R
HREF
and R
HBUF
. At the highest oscillator fre-
quency R
HBUF
does not contribute to the spread. The spread will increase towards lower frequencies
resistors and the recommended ratio is
=
1
3.5
due to the contribution of R
HBUF
. It is also dependent on the ratio
f
S(max)
f
S(min)
The following example is a 31.45 to 64kHz application:
f
S(max)
f
S(min)
n
s
=
=
= 2.04
64kHz
31.45kHz
Table 1.
Calculation of total spread
spread of:
IC
C
HCAP
R
HREF
R
HREF
. R
HBUF
Total
for f
max
3%
2%
1%
–
6%
for f
min
3%
2%
–
1% x (2.3 x n
s
–
1)
8,69%
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