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参数资料
| 型号： | NTE7134 |
| 厂商： | NTE Electronics, Inc. |
| 英文描述： | Integrated Circuit Horizontal and Vertical Deflection Controller for Monitors |
| 中文描述： | 集成电路水平和垂直偏转控制器监视器 |
| 文件页数： | 15/17页 |
| 文件大小： | 89K |
| 代理商： | NTE7134 |
Functional Description (Cont
’
d):
B+ Control Function Block (Cont
’
d)
B+ drive pulses are generated by an internal flip
–
flop and fed to BDRV (Pin6) vai an open collector
output stage. This flip
–
flop will be set at the rising edge of the signal at HDRV (Pin7). The falling edge
of the output signal at BDRV has a defined delay of t
d(BDRV)
to the rising edge of the HDRV pulse.
When the voltage at BSENS exceeds the voltage at BOP, the voltage comparator output resets the
flip
–
flop and therefore, the open collector stage at BDRV is floating again.
An internal discharge circuit allows a well defined discharge of capacitors at BSENS. BDRV is active
at a low level output voltage thus, it requires an external inverting driver stage.
The B+ function block can be used for B+ deflection modulators in either of two modes:
Feedback Mode
In this application the OTA is used as an error amplifier with a limited output voltage range. The
flip
–
flop will be set at the rising edge of the signal at HDRV. A reset will be generated when the
voltage at BSENS taken from the current sense resistor exceeds the voltage at BOP.
If not reset is generated within a line period, the rising edge of the next HDRV pulse forces the
flip
–
flop to reset. The flip
–
flop is set immediately after the voltage at BSENS has been dropped
below the threshold voltage V
RESTART(BSENS)
.
Feed Forward Mode
This application uses an external RC combination at BSENS to provide a pulse width which is inde-
pendent from the horizontal frequency. The capacitor is charged via an external resistor and dis-
charged by the internal discharge circuit. For normal operation the discharge circuit is activated
when the flip
–
flop is reset by the internal voltage comparator. Now the capacitor will be discharged
with a constant current until the internally controlled stop level V
STOP(BSENS)
is reached. This level
will be maintained until the rising edge of the next HDRV pulse sets the flip
–
flop again and disables
the discharge circuit.
If no reset is generated within a line period, the rising edge of the next HDRV pulse automatically
starts the discharge sequence and resets the flip
–
flop. When the voltage at BSENS reaches the
threshold voltage V
RESTART(BSENS)
, the discharge circuit will be disabled automatically and the
flip
–
flop will be set immediately. This behaviour allows a definition of the maximum duty cycle of
the B+ control drive pulse by the relationship of charge current to discharge current.
Supply Voltage Stabilizer, Reference and Protection
The ASDC provides an internal supply voltage stabilizer for excellent stabilization of all internal refer-
ences. An internal gap reference especially designed for low
–
noise is the reference for the internal
horizontal and vertical supply voltages. All internal reference currents and drive current for the vertical
output stage are derived from this voltage via external resistors.
A special protection mode has been implemented in order to protect the deflection stages and the
picture tube during start
–
up, shut
–
down and fault conditions. This protection mode can be activated
as shown in Table 3.
Table 3.
Activation of protection mode
Activation
Low Supply Voltage at Pin9
X
–
Ray Protection XRAY (Pin2) Triggered
HPLL2 (Pin31) Pulled to GND
Reset
Increase Supply Voltage
Remove Supply Voltage
Release Pin31
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