参数资料
型号: NTMD5838NLR2G
厂商: ON Semiconductor
文件页数: 2/6页
文件大小: 0K
描述: MOSFET N-CH 40V 8.9A 8SOIC
标准包装: 2,500
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 40V
电流 - 连续漏极(Id) @ 25° C: 7.4A
开态Rds(最大)@ Id, Vgs @ 25° C: 25 毫欧 @ 7A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 17nC @ 10V
输入电容 (Ciss) @ Vds: 785pF @ 20V
功率 - 最大: 2.1W
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
NTMD5838NL
ELECTRICAL CHARACTERISTICS (T J = 25 ° C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain ? to ? Source Breakdown Voltage
Drain ? to ? Source Breakdown Voltage
Temperature Coefficient
V (BR)DSS
V (BR)DSS /
T J
V GS = 0 V, I D = 250 m A
40
32
V
mV/ ° C
Zero Gate Voltage Drain Current
I DSS
V GS = 0 V,
V DS = 40 V
T J = 25 ° C
T J = 125 ° C
1.0
100
m A
Gate ? to ? Source Leakage Current
I GSS
V DS = 0 V, V GS = ± 20 V
± 100
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
V GS(TH)
V GS = V DS , I D = 250 m A
1.0
1.8
3.0
V
Negative Threshold Temperature Coefficient
V GS(TH) /T J
6.0
mV/ ° C
Drain ? to ? Source On Resistance
Forward Transconductance
R DS(on)
g FS
V GS = 10 V, I D = 7 A
V GS = 4.5 V, I D = 7 A
V DS = 15 V, I D = 7 A
16.2
25.0
4.0
20
36.5
m W
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C ISS
785
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
C OSS
C RSS
Q G(TOT)
V GS = 0 V, f = 1 MHz, V DS = 20 V
V GS = 10 V, V DS = 20 V; I D = 7 A
123
90
17
pF
8.6
11
Threshold Gate Charge
Q G(TH)
0.8
nC
Gate ? to ? Source Charge
Gate ? to ? Drain Charge
Q GS
Q GD
V GS = 4.5 V, V DS = 20 V; I D = 7 A
2.8
4.0
Plateau Voltage
Gate Resistance
V GP
R G
3.2
1.8
V
W
SWITCHING CHARACTERISTICS (Note 5)
Turn ? On Delay Time
t d(ON)
11
Rise Time
Turn ? Off Delay Time
Fall Time
t r
t d(OFF)
t f
V GS = 4.5 V, V DS = 20 V,
I D = 7 A, R G = 2.5 W
23
17
4.0
ns
DRAIN ? SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V SD
V GS = 0 V,
I S = 7 A
T J = 25 ° C
T J = 125 ° C
0.84
0.7
1.2
V
Reverse Recovery Time
t RR
17
Charge Time
Discharge Time
Reverse Recovery Charge
t a
t b
Q RR
V GS = 0 V, dIS/dt = 100 A/ m s,
I S = 7 A
11
6.0
10
ns
nC
4. Pulse Test: pulse width v 300 m s, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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