参数资料
型号: OM4068H/2,518
厂商: NXP Semiconductors
文件页数: 9/28页
文件大小: 0K
描述: IC LCD DRIVER 44-QFP
产品培训模块: LCD Driver
标准包装: 1
显示器类型: LCD
配置: 32 段
接口: 串行
电流 - 电源: 12µA
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 44-QFP
供应商设备封装: 44-PQFP(10x10)
包装: 标准包装
产品目录页面: 844 (CN2011-ZH PDF)
其它名称: 568-4513-6
Philips Semiconductors
LCD driver for low multiplex rates
Power-on reset
The on-chip power-on reset block initializes the chip after
power-on or power failures. The OM4068 resets to a
starting condition as follows:
? All backplane and segment outputs are set to V SS
(display off)
? All shift registers and latches are set in 3-state
? SDOUT (allowing serial cascading) is set to logic 0 (with
SCE LOW)
? Power-down mode.
Product speci?cation
OM4068
The bias levels depend on the multiplex rate and are
selected automatically when the display configuration is
selected using M1 and M0.
LCD voltage selector
The LCD voltage selector (control logic) coordinates the
multiplexing of the LCD in accordance with the selected
drive or display configuration. The operation of the voltage
selector is controlled by the input pins M0 and M1
(see Table 2).
Data transfers on the serial bus should be avoided for
Table 2
Drive mode selection
0.5 ms following power-on to allow completion of the reset
action.
Power-down
After power-on the chip is in power-down mode as long as
the serial clock is not active. During power-down all static
M1
0
0
1
1
M0
0
1
0
1
DRIVE MODE
test mode (not user accessible)
static drive (1 : 1)
duplex drive (1 : 2)
triplex drive (1 : 3)
currents are switched off (no internal oscillator, no timing
and no bias level generation) and all LCD-outputs are
3-stated. The power-on reset functions remain enabled.
The power-down mode is disabled at the first rising edge
of the serial clock SCLK.
LCD bias voltage generator
The intermediate bias voltages for the LCD display are
generated on-chip. This removes the need for an external
resistive bias chain and significantly reduces the system
power consumption. The full-scale LCD voltage V OP
equals V LCD ? V SS . The optimum value of V OP depends on
the LCD threshold voltage (V th ) and the number of bias
levels.
Fractional LCD biasing voltages are obtained from an
internal voltage divider of three series resistors ( 1 ? 3 bias)
connected between V LCD and V SS . The centre resistor can
be switched out of the circuit to provide a 1 ? 2 bias voltage
level for the 1 : 2 multiplex configuration.
1998 Jun 18
9
For multiplex rates of 1 : 2 three bias levels are used
including V LCD and V SS . Four bias level are used for the
1 : 3 multiplex rate. The various biasing configurations
together with the biasing characteristics as functions of
V OP = V LCD ? V SS and the resulting discrimination ratios
(D), are given in Table 3.
A practical value for V OP is determinated by equating
V off(rms) with a defined LCD threshold voltage (V th ),
typically when the LCD exhibits approximately 10%
contrast. In static mode a suitable choice is V OP > 3V th .
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