参数资料
型号: OR3L165B8PS432-DB
厂商: LATTICE SEMICONDUCTOR CORP
元件分类: FPGA
英文描述: FPGA, 1024 CLBS, 120000 GATES, 333 MHz, PBGA432
封装: EBGA-432
文件页数: 47/77页
文件大小: 873K
代理商: OR3L165B8PS432-DB
51
PD78052, 78053, 78054, 78055, 78056, 78058
Data Sheet U12327EJ5V0DS00
(v) 2-wire serial I/O mode (SCK0 ... Internal clock output)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
SCK0 cycle time
tKCY5
R = 1 k
,VDD = 2.7 to 6.0 V
1600
ns
C = 100 pFNote
3200
ns
SCK0 high-level width
tKH5
VDD = 2.7 to 6.0 V
tKCY5/2 – 160
ns
tKCY5/2 – 190
ns
SCK0 low-level width
tKL5
VDD = 4.5 to 6.0 V
tKCY5/2 – 50
ns
tKCY5/2 – 100
ns
SB0, SB1 setup time
tSIK5
4.5 V
≤ VDD ≤ 6.0 V
300
ns
(to SCK0
↑)
2.7 V
≤ VDD < 4.5 V
350
ns
400
ns
SB0, SB1 hold time
tKSI5
600
ns
(from SCK0
↑)
Delay time from SCK0
↓ tKSO5
0
300
ns
to SB0, SB1 output
Note R and C are the load resistance and load capacitance of the SCK0, SB0, and SB1 output lines.
(vi) 2-wire serial I/O mode (SCK0 ... Internal clock input)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
SCK0 cycle time
tKCY6
VDD = 2.7 to 6.0 V
1600
ns
3200
ns
SCK0 high-level width
tKH6
VDD = 2.7 to 6.0 V
650
ns
1300
ns
SCK0 low-level width
tKL6
VDD = 2.7 to 6.0 V
800
ns
1600
ns
SB0, SB1 setup time
tSIK6
100
ns
(to SCK0
↑)
SB0, SB1 hold time
tKSI6
tKCY6/2
ns
(from SCK0
↑)
Delay time from SCK0
↓ tKSO6
R = 1 k
,VDD = 4.5 to 6.0 V
0
300
ns
to SB0, SB1 output
C = 100 pFNote
0
500
ns
SCK0 rise, fall time
tR6, tF6
When using external device
160
ns
expansion function
When not using external device
1000
ns
expansion function
Note R and C are the load resistance and load capacitance of the SB0 and SB1 output lines.
相关PDF资料
PDF描述
OR3L165B8PS680-DB FPGA, 1024 CLBS, 120000 GATES, 333 MHz, PBGA680
OR3L165B7PS208-DB FPGA, 1024 CLBS, 120000 GATES, 266.4 MHz, PQFP208
OR3L165B7PS240I-DB FPGA, 1024 CLBS, 120000 GATES, 266.4 MHz, PQFP240
OR3L165B8PS208-DB FPGA, 1024 CLBS, 120000 GATES, 333 MHz, PQFP208
OR3L225B7PS432-DB FPGA, 1444 CLBS, 166000 GATES, 266.4 MHz, PBGA432
相关代理商/技术参数
参数描述
OR3L225B7BC432-DB 功能描述:FPGA - 现场可编程门阵列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
OR3L225B7BC432I-DB 功能描述:FPGA - 现场可编程门阵列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
OR3L225B7BM680-DB 功能描述:FPGA - 现场可编程门阵列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
OR3L225B7BM680I-DB 功能描述:FPGA - 现场可编程门阵列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
OR3L225B8BC432-DB 功能描述:FPGA - 现场可编程门阵列 11552 LUT 612 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256