参数资料
型号: ORSO42G5-3BM484C
厂商: Lattice Semiconductor Corporation
文件页数: 97/153页
文件大小: 0K
描述: IC FPSC TRANSCEIVER 4CH 484-BGA
产品变化通告: Product Discontinuation 01/Aug/2011
标准包装: 60
系列: *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
48
Alignment Mode Setup Procedures – ORSO82G5
The control register bits for alignment FIFO in the ORSO42G5 and ORSO82G5 are described below.
Table 8. Multichannel Alignment Modes – ORSO82G5
To align all eight channels:
FMPU_SYNMODE_A[A:D] = 11
FMPU_SYNMODE_B[A:D] = 11
To align twin channels in SERDES A:
FMPU_SYNMODE_A[A:D] = 01
To align four channels in SERDES A:
FMPU_SYNMODE_AB = 10
FMPU_SYNMODE_AD = 10
Similar alignment can be dened for SERDES B. To enable/disable synchronization signal of individual channel
within a multi-channel alignment group:
FMPU_STR_EN_xx = 1 enabled
FMPU_STR_EN_xx = 0 disabled
where xx is one of A[A:D] and B[A:D].
To re-synchronize a multi-channel alignment group
Set the following bit to zero, and then set it to 1 since it is a rising edge sensitive bit.
FMPU_RESYNC8 for eight channel A[A:D] and B[A:D]
FMPU_RESYNC4A for block channel A[A:D]
FMPU_RESYNC2A1 for twin channel A[A:B]
FMPU_RESYNC2A2 for twin channel A[C:D]
FMPU_RESYNC4B for block channel B[A:D]
Re-synchronization will cause the multi-channel alignment group to perform a new synchronization procedure. This
would need to occur if a link is removed from an alignment group and then paced back into service as part of the
alignment group. This is not required at power up if the alignment mode is set before the channels receive the rst
frame pulse.
Register Bits
FMPU_SYNMODE_xx
Mode
00
No multichannel alignment. (default)
01
Twin channel alignment
10
Block channel alignment
11
Eight channel alignment
Note: Where xx is one of A[A:D] and B[A:D].
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