参数资料
型号: PC100-323-620
厂商: SIEMENS AG
英文描述: 3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module
中文描述: 3.3 2米x 64/72-Bit一银行内存模块3.3 4米× 64/72-Bit 2银行内存模块
文件页数: 6/17页
文件大小: 104K
代理商: PC100-323-620
HYS64(72)V2200/4220GU-8/-10
SDRAM-Modules
Semiconductor Group
6
DC Characteristics
T
A
= 0 to 70
°
C;
V
SS
= 0 V;
V
DD,
V
DDQ
= 3.3 V
±
0.3 V
Capacitance
T
A
= 0 to 70
°
C;
V
DD
= 3.3 V
±
0.3 V,
f
= 1 MHz
Parameter
Symbol
Limit Values
Unit
min.
max.
Input high voltage
V
I
H
V
I
L
V
OH
V
OL
I
I
(L)
2.0
Vcc+0.3
V
Input low voltage
Output high voltage (
I
OUT
= – 2.0 mA)
Output low voltage (
I
OUT
= 2.0 mA)
Input leakage current, any input
(0 V <
V
I
N
< 3.6 V, all other inputs = 0 V)
Output leakage current
(DQ is disabled, 0 V <
V
OUT
<
V
CC
)
– 0.5
0.8
V
2.4
V
0.4
V
μ
A
– 40
40
I
O(L)
– 40
40
μ
A
Parameter
Symbol
Limit Values
Unit
max.
2Mx64
max.
2Mx72
max.
4Mx64
max.
4Mx72
Input capacitance
(A0 to A10, BA, RAS, CAS, WE)
C
I
1
45
55
80
90
pF
Input capacitance
(CS0 -CS3 )
C
I
2
C
I
CL
C
I
3
C
I
4
C
I
O
20
25
30
35
pF
Input capacitance (
CLK0 - CLK3
)
22
38
22
38
pF
Input capacitance
(CKE0, CKE1)
22
38
50
55
pF
Input capacitance
(DQMB0 - DQMB7)
13
13
20
20
pF
Input / Output capacitance
(DQ0-DQ63,CB0-CB7)
13
12
20
20
pF
Input Capacitance (SCL,SA0-2)
C
sc
C
sd
8
8
8
8
pF
Input/Output Capacitance
10
10
10
10
pF
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