Analog Integrated Circuit Device Data
Freescale Semiconductor
107
PC34708
Functional Block Requirements and Behaviors
Mini/Micro USB Interface Description and Application Information
The VUSB regulator defaults to ON when PUMS4:1 = [0100], and is supplied by the SWBST output. As shown in
Figure 22 above
this means that the M0 and MOTG switches are open, while the M1 switch is closed.
When PUMS4:1 is not equal to [0100], the VUSB regulator can not be enabled unless 5.0 V is present on the VBUS pin. If VBUS
is detected during a cold start, then the VUSB regulator will be enabled and powered ON in the sequence shown in
Power ControlM0 is closed and switch M1 and MOTG in
Figure 22 are open. If VBUS is not detected at cold start, then the VUSB regulator
cannot be enabled. If VBUS is detected later, the VUSB regulator will be enabled automatically be enabled and supplied from
the VBUS pin. The VUSBEN SPI bit is initialized at startup, based on the PUMS4:1 configuration. With PUMS4:1 not equal to
[0100], the VUSBEN SPI bit will default to a one on power up and will reset to a 1, when either RESETB is valid or VBUS is invalid.
This allows the VUSBEN regulator to be enabled automatically if the VUSB regulator was disabled by software. With PUMS4:1
equal to [0100], the VUSBEN bit will be enabled in the power up sequence.
The PC34708 also supports USB OTG mode by supplying 5.0 V to the VBUS pin. The OTGEN SPI bit along with the VUSBSEL
SPI bit, control switching the SWBST to drive VBUS in OTG mode. When OTGEN = 1 and VUSBSEL = 1, SWBST will be driving
the VBUS (switch M1 and MOTG are closed, and the M0 switch is open). In OTG mode, the MVBUS switch should be opened
and the MPD switch closed to isolate the charge input from VBUS. When OTG mode is disabled, the switch (MOTG) from
VINUSB to VBUS will be open.
In OTG mode, the VUSB regulator is enabled by setting the VUSBEN SPI bit to a one. When SWBST is supplying the VBUS pin
(OTG Mode), it will generate a USBDET interrupt. The USBDET interrupt while in OTG mode should not be interpreted as being
powered by the host by software.
Information), the VBUS node must be able to withstand the same high voltages as the charger. The VUSB regulator is disabled
and switches M0 and MOTG are opened in over-voltage conditions.
Table 111. VUSB Input Source Control (68) Parameter
Value
Function
VUSBSEL
0
Powered by Host: VBUS powers VUSB regulator (switch M0 closed and M1 open)
1
OTG mode: SWBST internally switched to supply the VUSB regulator (switch M1 closed, M0 open), and
SWBST will drive VBUS from the VINUSB pin as long as SPI bit OTGEN is set = 1.
Notes
68.
VUSBSEL = 1 and OTGEN = 1 only close the switch between the VINUSB and VBUS pins, but do not enable the SWBST boost
switcher (which should be enabled with SWBSTEN = 1)
Table 112. VUSB/OTG Switch Configuration
Mode
OTGEN VUSBSEL
Switches Enabled
(Closed)
Switches
Disabled (Open)
VUSB powered from
VBUS pin
0
M0
M1, MOTG
VUSB powered from
VINUSB pin
0
1
M1
M0, MOTG
Invalid option
1
0
OTG Mode (VUSB
powered from VINUSB
pin and SWBST
1
M1, MOTG
M0, MVBUS, MPD