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参数资料
| 型号： | PCA8802CX8/B/1 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PBGA8 |
| 封装： | 1.19 X 1.14 MM, 0.29 MM HEIGHT, LEAD FREE, WLCSP-8 |
| 文件页数： | 3/34页 |
| 文件大小： | 160K |
| 代理商： | PCA8802CX8/B/1 |
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PCA8802_1
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 19 February 2009
11 of 34
NXP Semiconductors
PCA8802
Smartcard RTC
9.5.6 Acknowledge
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited, but the duration of the access must not exceed
32 seconds. Each byte of eight bits is followed by an acknowledge bit. The acknowledge
bit is a HIGH level signal put on the bus by the transmitter during which time the master
generates an extra acknowledge related clock pulse. A slave receiver which is addressed
must generate an acknowledge after the reception of each byte. Also a master receiver
must generate an acknowledge after the reception of each byte that has been clocked out
of the slave transmitter. The device that acknowledges must pull-down the SDA line during
the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period
of the acknowledge related clock pulse (set-up and hold times must be taken into
consideration). A master receiver must signal an end of data to the transmitter by not
generating an acknowledge on the last byte that has been clocked out of the slave. In this
event the transmitter must leave the data line HIGH to enable the master to generate a
STOP condition. Acknowledgement is shown in Figure 16.
9.5.7 Data transfer
Fig 16. Acknowledgement on the I2C-bus
mbc602
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from
master
Fig 17. A complete data transfer
001aaj201
1 to 7
8
9
ADDRESS
ACK
DATA
S
START
condition
SCL
SDA
1 to 7
8
9
1 to 7
8
9
P
STOP
condition
ACK
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