参数资料
型号: PCA9624PW,118
厂商: NXP Semiconductors
文件页数: 16/37页
文件大小: 0K
描述: IC LED DRIVER RGBA 24-TSSOP
标准包装: 2,500
拓扑: 开路漏极,PWM
输出数: 8
内部驱动器:
类型 - 主要: 背光,LED 闪烁器
类型 - 次要: RGBA
频率: 100kHz ~ 1MHz
电源电压: 2.3 V ~ 5.5 V
输出电压: 40V
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 24-TSSOP
包装: 带卷 (TR)
工作温度: -40°C ~ 85°C
NXP Semiconductors
PCA9624
8-bit Fm+ I 2 C-bus 100 mA 40 V LED driver
SDA
SCL
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
I 2 C-BUS
MULTIPLEXER
SLAVE
002aaa966
Fig 10. System configuration
8.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up time and hold
time must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
data output
by transmitter
not acknowledge
data output
by receiver
acknowledge
SCL from master
1
2
8
9
S
START
condition
Fig 11. Acknowledgement on the I 2 C-bus
clock pulse for
acknowledgement
002aaa987
PCA9624
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 6 September 2012
? NXP B.V. 2012. All rights reserved.
16 of 37
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