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参数资料
型号： PCA9624PW,118
厂商： NXP Semiconductors
文件页数： 9/37页
文件大小： 0K
描述： IC LED DRIVER RGBA 24-TSSOP
标准包装： 2,500
拓扑： 开路漏极，PWM
输出数： 8
内部驱动器： 是
类型 - 主要： 背光，LED 闪烁器
类型 - 次要： RGBA
频率： 100kHz ~ 1MHz
电源电压： 2.3 V ~ 5.5 V
输出电压： 40V
安装类型： 表面贴装
封装/外壳： 24-TSSOP（0.173"，4.40mm 宽）
供应商设备封装： 24-TSSOP
包装： 带卷 (TR)
工作温度： -40°C ~ 85°C
NXP Semiconductors
PCA9624
8-bit Fm+ I 2 C-bus 100 mA 40 V LED driver
7.3.1 Mode register 1, MODE1
Table 5. MODE1 - Mode register 1 (address 00h) bit description
Legend: * default value.
Bit
7
Symbol
AI2
Access
read only
Value
0
Description
Register Auto-Increment disabled.
1*
Register Auto-Increment enabled.
6
AI1
read only
0*
Auto-Increment bit 1 = 0.
1
Auto-Increment bit 1 = 1.
5
AI0
read only
0*
Auto-Increment bit 0 = 0.
1
Auto-Increment bit 0 = 1.
4
SLEEP
R/W
0
Normal mode [1] .
1*
Low power mode. Oscillator off [2] .
3
SUB1
R/W
0*
PCA9624 does not respond to I 2 C-bus subaddress 1.
1
PCA9624 responds to I 2 C-bus subaddress 1.
2
SUB2
R/W
0*
PCA9624 does not respond to I 2 C-bus subaddress 2.
1
PCA9624 responds to I 2 C-bus subaddress 2.
1
SUB3
R/W
0*
PCA9624 does not respond to I 2 C-bus subaddress 3.
1
PCA9624 responds to I 2 C-bus subaddress 3.
0
ALLCALL
R/W
0
PCA9624 does not respond to LED All Call I 2 C-bus
address.
1*
PCA9624 responds to LED All Call I 2 C-bus address.
[1]
[2]
It takes 500 ? s max. for the oscillator to be up and running once SLEEP bit has been set to logic 0. Timings
on LEDn outputs are not guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the
500 ? s window.
No blinking or dimming is possible when the oscillator is off.
7.3.2 Mode register 2, MODE2
Table 6. MODE2 - Mode register 2 (address 01h) bit description
Legend: * default value.
Bit
7
6
5
Symbol
-
-
DMBLNK
Access
read only
read only
R/W
Value
0*
0*
0*
Description
reserved
reserved
group control = dimming.
1
group control = blinking.
4
3
INVRT
OCH
R/W
R/W
0*
0*
reserved; write must always be a logic 0
outputs change on STOP command [1]
1
outputs change on ACK
2
1
0
-
-
-
R/W
R/W
R/W
1*
0*
1*
reserved; write must always be a logic 1 [2]
reserved; write must always be a logic 0 [2]
reserved; write must always be a logic 1 [2]
[1]
[2]
Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9624.
Applicable to registers from 02h (PWM0) to 08h (LEDOUT) only.
Remark: If you change these bits from their default values, the device will not perform as expected.
PCA9624
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 6 September 2012
? NXP B.V. 2012. All rights reserved.
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