4.4 Two-Wire Digital Interface
Two-Wire digital interface is provided through the conversion of RS-232 signals from U9 into open drain
outputs with pull-ups (SDA
OUT
through U6 and SCL
OUT
through U8). SDA
IN
is tied direct to U9 which is looking
for <0.8V for a logic low and >2.0V (3V supply) or >2.4V (5V supply) for a logic high. U10 and U11 provide a
mechanism, through software or hardware (JE), to separate the Two-Wire bus interface from the PGA309 if it
is physically connected. If the PGA309 is in stand-alone mode it will be routinely accessing its external
EEPROM via the Two-Wire interface as a master. By disconnecting from the PGA309 Two-Wire connections
dedicated, local Two-Wire transactions on the PGA309 PC Interface Board such as reading the ADS1100, U3,
can be conducted reliably and without interruption.
Note: It is recommended to keep One-Wire interface on the PGA309 PC Interface Board connected to
the PGA309 Sensor Interface Board even when using Two-Wire communication mode to the PGA309
and EEPROM from the PGA309EVM Board Software. See Section 7.8 for details.
4.5 ADS1100 (On-Board A/D Converter)
The ADS1100 is a 16-Bit A/D available to measure Vout from the PGA309. The ADS1100 is configurable
through the Board Control Software. U4 provides a means of measuring the ADS1100 initial offset for
improved accuracy in its readings.
4.6 Test Points and Miscellaneous Breadboard Area
There are several Test Points, including a 3-position one for GND, provided for ease of measuring analog
signals. Also provided are reserved areas with plated-through, standard-spacing, 0.1” holes for miscellaneous
proof-of-concept breadboarding as desired for a given application.
5.0
PGA309 PC Interface Board Overview – Part 2
(Refer to PGA309EVM PC Interface Board Schematic, Sheet 2 of 2)
5.1 One-Wire Active Pull-Up
The One-Wire Active Pull-Up circuitry is intended to provide a fast rising edge pull-up when the One-Wire
interface is connected to heavy capacitive loads such as when PRG is tied to Vout on the PGA309 and there
is a 10nF capacitor on Vout to GND. In this configuration there is an extremely long rise time due to a 4.7k
pull-up on the One-Wire interface. One-Shot U14 is rising edge triggered only, non-retriggerable. Comparator
U12 looks for a rising edge to transition above 0.7V. The One-Shot, U14, then triggers and produces a 5
μ
S
wide pulse which controls switch U13. When switch U13 is turned on a 200
pull-up to V
S
is provided on the
One-Wire Interface. At the end of the 5
μ
S pulse the 200
pull-up to V
S
is removed. The 5
μ
S was chosen to
provide a near-symmetrical rise and fall time into a 10nF load on the One-Wire interface. RT is a provisional
potentiometer which can be added to change the time the active pull-up is applied to the One-Wire Interface.
D5, D6 and R22 proved a clamp to keep the input of U12 inside its allowed input voltage range for reliable
operation. Figure 2 illustrates the One-Wire Pull-Up into a non-capacitive load. The table shows typical
values for a supply voltage of 3.0V.
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