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参数资料
| 型号： | PH28F256L18T85 |
| 厂商： | INTEL CORP |
| 元件分类： | PROM |
| 英文描述： | StrataFlash Wireless Memory |
| 中文描述： | 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA79 |
| 封装： | 0.75 MM PITCH, LEAD FREE, VFBGA-79 |
| 文件页数： | 58/106页 |
| 文件大小： | 1272K |
| 代理商： | PH28F256L18T85 |
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Intel StrataFlash Wireless Memory (L18)
April 2005
58
Intel StrataFlash Wireless Memory (L18)
Order Number: 251902, Revision: 009
Datasheet
11.0
Programming Operations
The device supports three programming methods: Word Programming (40h/10h), Buffered
Programming (E8h, D0h), and Buffered Enhanced Factory Programming (Buffered EFP) (80h,
D0h). See
Section 9.0, “Device Operations” on page 45
for details on the various programming
commands issued to the device.
Successful programming requires the addressed block to be unlocked. If the block is locked down,
WP# must be deasserted and the block must be unlocked before attempting to program the block.
Attempting to program a locked block causes a program error (SR[4] and SR[1] set) and
termination of the operation. See
Section 13.0, “Security Modes” on page 66
for details on locking
and unlocking blocks.
The following sections describe device programming in detail.
11.1
Word Programming
Word programming operations are initiated by writing the Word Program Setup command to the
device (see
Section 9.0, “Device Operations” on page 45
). This is followed by a second write to the
device with the address and data to be programmed. The partition accessed during both write
cycles outputs Status Register data when read. The partition accessed during the second cycle (the
data cycle) of the program command sequence is the location where the data is written. See
Figure
39, “Word Program Flowchart” on page 85
.
Programming can occur in only one partition at a time; all other partitions must be in a read state or
in erase suspend. V
PP
must be above V
PPLK
, and within the specified V
PPL
min/max values
(nominally 1.8 V).
During programming, the Write State Machine (WSM) executes a sequence of internally-timed
events that program the desired data bits at the addressed location, and verifies that the bits are
sufficiently programmed. Programming the flash memory array changes “ones” to “zeros.”
Memory array bits that are zeros can be changed to ones only by erasing the block (see
Section
12.0, “Erase Operations” on page 64
).
The Status Register can be examined for programming progress and errors by reading any address
within the partition that is being programmed. The partition remains in the Read Status Register
state until another command is written to that partition. Issuing the Read Status Register command
to another partition address sets that partition to the Read Status Register state, allowing
programming progress to be monitored at that partition’s address.
Status Register bit SR[7] indicates the programming status while the sequence executes.
Commands that can be issued to the programming partition during programming are Program
Suspend, Read Status Register, Read Device Identifier, CFI Query, and Read Array (this returns
unknown data).
When programming has finished, Status Register bit SR[4] (when set) indicates a programming
failure. If SR[3] is set, the WSM could not perform the word programming operation because V
PP
was outside of its acceptable limits. If SR[1] is set, the word programming operation attempted to
program a locked block, causing the operation to abort.
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