参数资料
型号: PHB125N06L
厂商: NXP Semiconductors N.V.
英文描述: TrenchMOS transistor Logic level FET(TrenchMOS 晶体管逻辑电平FET)
中文描述: TrenchMOS场效应晶体管逻辑电平(TrenchMOS晶体管逻辑电平场效应管)
文件页数: 5/9页
文件大小: 71K
代理商: PHB125N06L
Philips Semiconductors
Product specification
TrenchMOS
transistor
Logic level FET
PHP125N06LT, PHB125N06LT
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 C
= f(T
j
); I
D
= 25 A; V
GS
= 5 V
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 C; V
DS
= V
GS
Fig.12. Typical capacitances, C
, C
, C
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 50 A; parameter V
DS
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
-100
-50
0
50
100
150
200
0.5
1
1.5
2
2.5
BUK959-60
Tmb / degC
Rds(on) normlised to 25degC
a
0.01
0.1
1
10
100
0
2
4
6
8
10
12
T
VDS/V
Ciss
Coss
BUK959-60
-100
-50
0
50
100
150
200
0
0.5
1
1.5
2
2.5
Tj / C
VGS(TO) / V
max.
typ.
min.
0
10
20
30
40
50
QG/nC
60
70
80
90
0
1
2
3
4
5
6
VGS/V
VDS = 14V
VDS = 44V
0
0.5
1
1.5
2
2.5
3
1E-05
1E-05
1E-04
1E-03
1E-02
1E-01
Sub-Threshold Conduction
2%
typ
98%
0
0.2
0.4
0.6
VSDS/V
0.8
1
1.2
0
20
40
60
80
100
Tj/C =
175
25
IF/A
March 1998
5
Rev 1.400
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