收藏本站
参数资料
型号： PIC12C508AT-04/SN
厂商： Microchip Technology
文件页数： 39/113页
文件大小： 0K
描述： IC MCU OTP 512X12 8SOIC
产品培训模块： Asynchronous Stimulus
标准包装： 3,300
系列： PIC® 12C
核心处理器： PIC
芯体尺寸： 8-位
速度： 4MHz
外围设备： POR，WDT
输入/输出数： 5
程序存储器容量： 768B（512 x 12）
程序存储器类型： OTP
RAM 容量： 25 x 8
电压 - 电源 (Vcc/Vdd)： 3 V ~ 5.5 V
振荡器型： 内部
工作温度： 0°C ~ 70°C
封装/外壳： 8-SOIC（0.154"，3.90mm 宽）
包装： 带卷 (TR)
配用： 309-1046-ND - ADAPTER 8-SOIC TO 8-DIP
309-1045-ND - ADAPTER 8-SOIC TO 8-DIP
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
1999 Microchip Technology Inc.
DS40139E-page 31
PIC12C5XX
7.0.2
SERIAL CLOCK
This SCL input is used to synchronize the data transfer
from and to the device.
7.1
BUS CHARACTERISTICS
The following bus protocol is to be used with the
EEPROM data memory.
Data transfer may be initiated only when the bus
is not busy.
During data transfer, the data line must remain stable
whenever the clock line is HIGH. Changes in the data
line while the clock line is HIGH will be interpreted as a
START or STOP condition.
Accordingly, the following bus conditions have been
defined (Figure 7-3).
7.1.1
BUS NOT BUSY (A)
Both data and clock lines remain HIGH.
7.1.2
START DATA TRANSFER (B)
A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition. All
commands must be preceded by a START condition.
7.1.3
STOP DATA TRANSFER (C)
A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must be ended with a STOP condition.
7.1.4
DATA VALID (D)
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
The data on the line must be changed during the LOW
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device
and is theoretically unlimited.
7.1.5
ACKNOWLEDGE
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this acknowledge bit.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse.
Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an acknowledge bit on the last
byte that has been clocked out of the slave. In this case,
the slave must leave the data line HIGH to enable the
master to generate the STOP condition (Figure 7-4).
Note:
Acknowledge bits are not generated if an
internal programming cycle is in progress.
相关PDF资料
PDF描述
GRM2165C2A162JA01D CAP CER 1600PF 100V 5% NP0 0805
GRM2165C2A152JA01D CAP CER 1500PF 100V 5% NP0 0805
GRM2165C2A132JA01D CAP CER 1300PF 100V 5% NP0 0805
GRM2165C2A122JA01D CAP CER 1200PF 100V 5% NP0 0805
GRM2165C2A112JA01D CAP CER 1100PF 100V 5% NP0 0805
相关代理商/技术参数
参数描述
PIC12C508T 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller
PIC12C508T-04/EJW 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontrollers
PIC12C508T-04/EP 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontrollers
PIC12C508T-04/ESM 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontrollers
PIC12C508T-04/ESN 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontrollers
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*