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参数资料
型号： PIC16F526T-I/SL
厂商： Microchip Technology
文件页数： 25/122页
文件大小： 0K
描述： IC PIC MCU FLASH 1KX12 14SOIC
标准包装： 2,600
系列： PIC® 16F
核心处理器： PIC
芯体尺寸： 8-位
速度： 20MHz
外围设备： POR，WDT
输入/输出数： 11
程序存储器容量： 1.5KB（1K x 12）
程序存储器类型： 闪存
RAM 容量： 67 x 8
电压 - 电源 (Vcc/Vdd)： 2 V ~ 5.5 V
数据转换器： A/D 3x8b
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 14-SOIC（0.154"，3.90mm 宽）
包装： 带卷 (TR)
配用： ICE2000-ND - EMULATOR MPLAB-ICE 2000 POD
其它名称： PIC16F526T-I/SLTR
PIC18F2221/2321/4221/4321 FAMILY
DS39689F-page 120
2009 Microchip Technology Inc.
11.4
PORTD, TRISD and LATD
Registers
PORTD is an 8-bit wide, bidirectional port. The
corresponding Data Direction register is TRISD. Set-
ting a TRISD bit (= 1) will make the corresponding
PORTD pin an input (i.e., put the corresponding output
driver in a High-Impedance mode). Clearing a TRISD
bit (= 0) will make the corresponding PORTD pin an
output (i.e., put the contents of the output latch on the
selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt Trigger
input buffers. Each pin is individually configurable as an
input or output.
Three of the PORTD pins are multiplexed with outputs
P1B, P1C and P1D of the Enhanced CCP module. The
operation of these additional PWM output pins is
covered in greater detail in Section 17.0 “Enhanced
Capture/Compare/PWM (ECCP) Module”.
PORTD can also be configured as an 8-bit wide micro-
processor port (Parallel Slave Port) by setting control
bit, PSPMODE (TRISE<4>). In this mode, the input
buffers are TTL. See Section 11.6 “Parallel Slave
Port” for additional information on the Parallel Slave
Port (PSP).
EXAMPLE 11-4:
INITIALIZING PORTD
Note:
PORTD is only available on 40/44-pin
devices.
Note:
On a Power-on Reset, these pins are
configured as digital inputs.
Note:
When the Enhanced PWM mode is used
with either dual or quad outputs, the PSP
functions of PORTD are automatically
disabled.
CLRF
PORTD
; Initialize PORTD by
; clearing output
; data latches
CLRF
LATD
; Alternate method
; to clear output
; data latches
MOVLW
0CFh
; Value used to
; initialize data
; direction
MOVWF
TRISD
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
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