PIC16F872-E/SO (Microchip) PDF资料下载 Datasheet(155/167 页)

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8048C–AVR–02/12

ATtiny43U

The extreme values for the OCRnA Register represents special cases when generating a PWM

waveform output in the fast PWM mode. If the OCRnA is set equal to BOTTOM, the output will

be a narrow spike for each MAX+1 timer clock cycle. Setting the OCRnA equal to MAX will result

in a constantly high or low output (depending on the polarity of the output set by the COMnA[1:0]

bits.)

A frequency (with 50% duty cycle) waveform output in fast PWM mode can be achieved by set-

ting OCnx to toggle its logical level on each Compare Match (COMnx[1:0] = 1). The waveform

generated will have a maximum frequency of f

OCnx = fclk_I/O/2 when OCRnA is set to zero. This

feature is similar to the OCnA toggle in CTC mode, except the double buffer feature of the Out-

put Compare unit is enabled in the fast PWM mode.

12.7.4

Phase Correct PWM Mode

The phase correct PWM mode (WGMn[2:0] = 1 or 5) provides a high resolution phase correct

PWM waveform generation option. The phase correct PWM mode is based on a dual-slope

operation. The counter counts repeatedly from BOTTOM to TOP and then from TOP to BOT-

TOM. TOP is defined as 0xFF when WGMn[2:0] = 1, and OCRnA when WGMn[2:0] = 5. In non-

inverting Compare Output mode, the Output Compare (OCnx) is cleared on the Compare Match

between TCNTn and OCRnx while upcounting, and set on the Compare Match while down-

counting. In inverting Output Compare mode, the operation is inverted. The dual-slope operation

has lower maximum operation frequency than single slope operation. However, due to the sym-

metric feature of the dual-slope PWM modes, these modes are preferred for motor control

applications.

In phase correct PWM mode the counter is incremented until the counter value matches TOP.

When the counter reaches TOP, it changes the count direction. The TCNTn value will be equal

to TOP for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown

on Figure 12-7 on page 89. The TCNTn value is in the timing diagram shown as a histogram for

illustrating the dual-slope operation. The diagram includes non-inverted and inverted PWM out-

puts. The small horizontal line marks on the TCNTn slopes represent Compare Matches

between OCRnx and TCNTn.

相关代理商/技术参数	参数描述
PIC16F872-I/SO	功能描述:8位微控制器 -MCU 3.5KB 128 RAM 22 I/O RoHS:否制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC16F872-I/SO	制造商:Microchip Technology Inc 功能描述:8BIT FLASH MCU SMD 16F872 SOIC28
PIC16F872-I/SOG	功能描述:8位微控制器 -MCU 3.5KB 128 RAM 22 I/O Lead Free Package RoHS:否制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC16F872-I/SP	功能描述:8位微控制器 -MCU 3.5KB 128 RAM 22 I/O RoHS:否制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC16F872-I/SP	制造商:Microchip Technology Inc 功能描述:IC 8BIT FLASH MCU 16F872 SDIL28

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