参数资料
型号: PIC18F448-E/P
厂商: Microchip Technology
文件页数: 107/116页
文件大小: 0K
描述: IC MCU FLASH 8KX16 W/CAN 40-DIP
产品培训模块: Asynchronous Stimulus
标准包装: 10
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 40MHz
连通性: CAN,I²C,SPI,UART/USART
外围设备: 欠压检测/复位,LVD,POR,PWM,WDT
输入/输出数: 33
程序存储器容量: 16KB(8K x 16)
程序存储器类型: 闪存
EEPROM 大小: 256 x 8
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 4.2 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 外部
工作温度: -40°C ~ 125°C
封装/外壳: 40-DIP(0.600",15.24mm)
包装: 管件
PIC18FXX8
DS41159E-page 88
2006 Microchip Technology Inc.
8.4
IPR Registers
The Interrupt Priority (IPR) registers contain the individ-
ual priority bits for the peripheral interrupts. Due to the
number of peripheral interrupt sources, there are three
Peripheral Interrupt Priority registers (IPR1, IPR2 and
IPR3). The operation of the priority bits requires that
the Interrupt Priority Enable bit (IPEN) be set.
REGISTER 8-10:
IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
R/W-1
PSPIP(1)
ADIP
RCIP
TXIP
SSPIP
CCP1IP
TMR2IP
TMR1IP
bit 7
bit 0
bit 7
PSPIP: Parallel Slave Port Read/Write Interrupt Priority bit(1)
1
=High priority
0
= Low priority
bit 6
ADIP: A/D Converter Interrupt Priority bit
1
=High priority
0
= Low priority
bit 5
RCIP: USART Receive Interrupt Priority bit
1
=High priority
0
= Low priority
bit 4
TXIP: USART Transmit Interrupt Priority bit
1
=High priority
0
= Low priority
bit 3
SSPIP: Master Synchronous Serial Port Interrupt Priority bit
1
=High priority
0
= Low priority
bit 2
CCP1IP: CCP1 Interrupt Priority bit
1
= High priority
0
= Low priority
bit 1
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1
=High priority
0
= Low priority
bit 0
TMR1IP: TMR1 Overflow Interrupt Priority bit
1
= High priority
0
= Low priority
Note 1: This bit is only available on PIC18F4X8 devices. For PIC18F2X8 devices, this bit
is unimplemented and reads as ‘0’.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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