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参数资料
| 型号： | PIC18F85J50T-I/PT |
| 厂商： | Microchip Technology |
| 文件页数： | 29/61页 |
| 文件大小： | 0K |
| 描述： | IC PIC MCU FLASH 16KX16 80TQFP |
| 产品培训模块： | Asynchronous Stimulus PIC18 J Series MCU Overview |
| 标准包装： | 1,200 |
| 系列： | PIC® 18F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 48MHz |
| 连通性： | EBI/EMI，I²C，SPI，UART/USART，USB |
| 外围设备： | 欠压检测/复位，LVD，POR，PWM，WDT |
| 输入/输出数： | 65 |
| 程序存储器容量： | 32KB（16K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 3.8K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2 V ~ 3.6 V |
| 数据转换器： | A/D 12x10b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 80-TQFP |
| 包装： | 带卷 (TR) |
| 配用： | AC162087-ND - HEADER MPLAB ICD2 18F87J50 68/84 MA180021-ND - MODULE PLUG-IN 18F87J50 FS USB AC164328-ND - MODULE SKT FOR 80TQFP |
| 其它名称： | PIC18F85J50T-I/PTTR |
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Philips Semiconductors
Product data
P87LPC767
Low power, low price, low pin count (20 pin)
microcontroller with 4-kbyte OTP and 8-bit A/D converter
2002 Mar 25
32
Mode 0
Putting either Timer into Mode 0 makes it look like an 8048 Timer,
which is an 8-bit Counter with a divide-by-32 prescaler. Figure 26
shows Mode 0 operation.
In this mode, the Timer register is configured as a 13-bit register. As
the count rolls over from all 1s to all 0s, it sets the Timer interrupt
flag TFn. The count input is enabled to the Timer when TRn = 1 and
either GATE = 0 or INTn = 1. (Setting GATE = 1 allows the Timer to
be controlled by external input INTn, to facilitate pulse width
measurements). TRn is a control bit in the Special Function Register
TCON (Figure 25). The GATE bit is in the TMOD register.
The 13-bit register consists of all 8 bits of THn and the lower 5 bits
of TLn. The upper 3 bits of TLn are indeterminate and should be
ignored. Setting the run flag (TRn) does not clear the registers.
Mode 0 operation is the same for Timer 0 and Timer 1. See
Figure 26. There are two different GATE bits, one for Timer 1
(TMOD.7) and one for Timer 0 (TMOD.3).
BIT
SYMBOL
FUNCTION
TCON.7
TF1
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when the
interrupt is processed, or by software.
TCON.6
TR1
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter 1 on/off.
TCON.5
TF0
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when the
processor vectors to the interrupt routine, or by software.
TCON.4
TR0
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter 0 on/off.
TCON.3
IE1
Interrupt 1 Edge flag. Set by hardware when external interrupt 1 edge is detected. Cleared by
hardware when the interrupt is processed, or by software.
TCON.2
IT1
Interrupt 1 Type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
TCON.1
IE0
Interrupt 0 Edge flag. Set by hardware when external interrupt 0 edge is detected. Cleared by
hardware when the interrupt is processed, or by software.
TCON.0
IT0
Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
IT0
SU01172
IE0
IT1
IE1
TR0
TF0
TR1
TF1
0
1
2
3
4
5
6
7
TCON
Reset Value: 00h
Bit Addressable
Address: 88h
Figure 25. Timer/Counter Control Register (TCON)
SU01173
TLn
(5 BITS)
THn
(8 BITS)
OSC/6
OR
OSC/12
OVERFLOW
Tn PIN
TnOE
TOGGLE
CONTROL
C/T = 1
C/T = 0
Tn PIN
TRn
GATE
INTn PIN
INTERRUPT
TFn
Figure 26. Timer/Counter 0 or 1 in Mode 0 (13-Bit Counter)
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