参数资料
型号: PSD813FH
英文描述: Field Programmble Microcontroller Peripherals With Flash Memory(带闪存的现场可编程微控制器)
中文描述: 场可编程微控制器外围设备与快闪记忆体(带闪存的现场可编程微控制器)
文件页数: 11/83页
文件大小: 369K
代理商: PSD813FH
Prelimnary
PSD813FN/FH
11
The
PSD813FN/FH
Functional
Blocks
The PSD813FN/FH consists of five major functional blocks:
J
PLDBlock
J
Bus Interface
J
I/OPorts
J
Memory Block
J
Power Management Unit
The functions of each block are described in the following sections. Many of the blocks
perform multiple functions, and are user configurable.
PLDs
The PLDs bring programmable logic functionality to the PSD813FN/FH. After specifying the
logic for the PLDs by using the PSDabel tool in the PSDsoft suite, the logic configuration is
programmed into the device and available when power is applied.
The PLDs (DPLD, ECSPLD and GPLD) consist of an AND array. The GPLD architecture
includes 12 Output Micro
Cells in addition to the AND array. There are 23 Input
Micro
Cells that can be configured as inputs to the PLD. Figure 3 shows the organization
of the PLDs.
The AND array is used to form product terms specified using the PSDabel tool in the
PSDsoft development system. When the inputs used in a term are true, the output is active.
The GPLD Input Bus consists of 63 signals as shown in Table 6. Both the true and
complement value of inputs are available to the AND array. The DPLD and ECSPLD Input
Busses consists of fewer inputs and is a subset of the 63 inputs.
Input Source
Input Name
Number of Signals
MCU Address Bus
A[15:0]
16
MCU Control Signals
CNTL[2:0]
3
Reset
RST
1
Power Down
PDN
1
I/O Ports Inputs (Input Micro
Cells)
PA[7:0], PB[7:0]
PC[7:3], PC[1:0]
23
Port D Inputs
PD[2:0]
3
Page Register
PGR[3:0]
4
Port A or B Micro
Cell Feedback
Port C Micro
Cell Feedback
MCELLAB.FB[7:4]
4
MCELLC.FB[7:0]
8
Table 6. GPLDInputs
相关PDF资料
PDF描述
PSD82 Three Phase Rectifier Bridges
PSD834F2V Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit + 256 Kbit Dual Flash Memories and 64 Kbit SRAM(2M位+256K位双路闪速存储器和64K位静态RAM,闪速PSD,3.3V电源,用于8位MCU.)
PSD834F2 Flash In-System Programmable (ISP) Peripherals For 8-bit MCUs(用于8位MCUs的闪速ISP外围)
PSD835G2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(8位微控制器片上存储器可编程外设)
PSD835G2 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA Tabless package; Similar to IRHMJ57160 with optional Total Dose Rating of 1000kRads
相关代理商/技术参数
参数描述
PSD813FH-15J 制造商:WSI 功能描述:
PSD813FH-90J 制造商:WSI 功能描述:
PSD813FN-15J 制造商:WSI 功能描述:
PSD833F2-90J 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
PSD833F2-90JI 功能描述:SPLD - 简单可编程逻辑器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24