参数资料
型号: PSD834F2V
英文描述: Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit + 256 Kbit Dual Flash Memories and 64 Kbit SRAM(2M位+256K位双路闪速存储器和64K位静态RAM,闪速PSD,3.3V电源,用于8位MCU.)
中文描述: 闪光私营部门,3.3V电源,为8位微控制器2兆256千位双闪存和64千位的SRAM(200万位256K位双路闪速存储器和64K的位静态内存,闪速私营部门,3.3V的电源,用于8位微控制器。)
文件页数: 11/89页
文件大小: 522K
代理商: PSD834F2V
11/89
PSD834F2V
PIN DESCRIPTION
Table 4 describes the signal names and signal
functions of the PSD.
Table 4. Pin Description (for the PLCC52 package
1
)
Pin Name
Pin
Type
Description
ADIO0-7
30-37
I/O
This is the lower Address/Data port. Connect your MCU address or address/data bus
according to the following rules:
1. If your MCU has a multiplexed address/data bus where the data is multiplexed with the
lower address bits, connect AD0-AD7 to this port.
2. If your MCU does not have a multiplexed address/data bus, or you are using an
80C251 in page mode, connect A0-A7 to this port.
3. If you are using an 80C51XA in burst mode, connect A4/D0 through A11/D7 to this
port.
ALE or AS latches the address. The PSD drives data out only if the read signal is active
and one of the PSD functional blocks was selected. The addresses on this port are
passed to the PLDs.
ADIO8-15
39-46
I/O
This is the upper Address/Data port. Connect your MCU address or address/data bus
according to the following rules:
1. If your MCU has a multiplexed address/data bus where the data is multiplexed with the
lower address bits, connect A8-A15 to this port.
2. If your MCU does not have a multiplexed address/data bus, connect A8-A15 to this
port.
3. If you are using an 80C251 in page mode, connect AD8-AD15 to this port.
4. If you are using an 80C51XA in burst mode, connect A12/D8 through A19/D15 to this
port.
ALE or AS latches the address. The PSD drives data out only if the read signal is active
and one of the PSD functional blocks was selected. The addresses on this port are
passed to the PLDs.
CNTL0
47
I
The following control signals can be connected to this port, based on your MCU:
1. WR – active Low Write Strobe input.
2. R_W – active High read/active Low write input.
This port is connected to the PLDs. Therefore, these signals can be used in decode and
other logic equations.
CNTL1
50
I
The following control signals can be connected to this port, based on your MCU:
1. RD – active Low Read Strobe input.
2. E – E clock input.
3. DS – active Low Data Strobe input.
4. PSEN – connect PSEN to this port when it is being used as an active Low read signal.
For example, when the 80C251 outputs more than 16 address bits, PSEN is actually the
read signal.
This port is connected to the PLDs. Therefore, these signals can be used in decode and
other logic equations.
CNTL2
49
I
This port can be used to input the PSEN (Program Select Enable) signal from any MCU
that uses this signal for code exclusively. If your MCU does not output a Program Select
Enable signal, this port can be used as a generic input. This port is connected to the
PLDs.
Reset
48
I
Resets I/O Ports, PLD macrocells and some of the Configuration Registers. Must be Low
at Power-up.
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相关代理商/技术参数
参数描述
PSD834F2V-15J 功能描述:CPLD - 复杂可编程逻辑器件 3.0V 2M 150ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
PSD834F2V-15M 功能描述:CPLD - 复杂可编程逻辑器件 3.0V 2M 150ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
PSD834F2V-20JI 功能描述:CPLD - 复杂可编程逻辑器件 3.0V 2M 200ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
PSD834F2V-20MI 功能描述:SPLD - 简单可编程逻辑器件 3.0V 2M 200ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24
PSD835G2-70U 功能描述:静态随机存取存储器 5.0V 4M 70ns RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray