参数资料
型号: PSD935F1-B-90B81
厂商: 意法半导体
英文描述: Configurable Memory System on a Chip for 8-Bit Microcontrollers
中文描述: 在8片位微控制器可配置存储系统
文件页数: 4/91页
文件大小: 488K
代理商: PSD935F1-B-90B81
PSD935G2
PSD9XX Family
11
Table 6 shows the offset addresses to the PSD935G2 registers relative to the CSIOP base
address. The CSIOP space is the 256 bytes of address that is allocated by the user to the
internal PSD935G2 registers. Table 6 provides brief descriptions of the registers in CSIOP
space. For a more detailed description, refer to section 9.
7.0 PSD935G2
Register
Description and
Address Offset
Register Name
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Other*
Description
Data In
00
01
10
11
30
40
41
Reads Port pin as input,
MCU I/O input mode
Control
32
42
43
Selects mode between
MCU I/O or Address Out
Stores data for output
Data Out
04
05
14
15
34
44
45
to Port pins, MCU I/O
output mode
Direction
06
07
16
17
36
46
47
Configures Port pin as
input or output
Configures Port pins as
either CMOS or Open
Drive Select
08
09
18
19
38
49
Drain on some pins, while
selecting high slew rate
on other pins.
Flash Protection
C0
Read only – Flash Sector
Protection
Flash Boot
Read only – PSD Security
Protection
C2
and Flash Boot Sector
Protection
PMMR0
B0
Power Management
Register 0
PMMR2
B4
Power Management
Register 2
Page
E0
Page Register
Places PSD memory
VM
E2
areas in Program and/or
Data space on an
individual basis.
Memory_ID0
F0
Read only – Flash and
SRAM size
Memory_ID1
F1
Read only – Boot type
and size
Table 6. Register Address Offset
相关PDF资料
PDF描述
PSD935F1-B-90B81I Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 20pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: 100% Tin (Sn); Body Dimensions: 0.080" x 0.050" x 0.055"; Container: Bag; Features: MIL-PRF-55681: S Failure Rate
PSD935F1-B-90J Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F1-B-90JI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F1-B-90M Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F1-B-90MI Configurable Memory System on a Chip for 8-Bit Microcontrollers
相关代理商/技术参数
参数描述
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PSD935G2V-90U 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD835G2V-90U RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24
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