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参数资料
| 型号： | PSD935F1-B-90B81 |
| 厂商： | 意法半导体 |
| 英文描述： | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| 中文描述： | 在8片位微控制器可配置存储系统 |
| 文件页数： | 6/91页 |
| 文件大小： | 488K |
| 代理商： | PSD935F1-B-90B81 |
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PSD935G2
PSD9XX Family
13
8.0
Register Bit
Definition
(cont.)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Security_Bit
***
Sec3_Prot
Sec2_Prot
Sec1_Prot Sec0_Prot
Flash Boot Protection Register
Bit definitions:
Sec<i>_Prot
1 = Boot Block Sector <i> is write protected.
Sec<i>_Prot
0 = Boot Block Sector <i> is not write protected.
Security_Bit
0 = Security Bit in device has not been set.
1 = Security Bit in device has been set.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pgr7
Pgr6
Pgr5
Pgr4
Pgr3
Pgr2
Pgr1
Pgr0
Page Register
Bit definitions:
Configure Page input to PLD. Default Pgr[7:0] = 00.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
**
PLD
*
APD
*
Mcells clk
array-clk
Turbo
enable
PMMR0 Register
Bit definitions: (default is 0)
Bit 1 0 = Automatic Power Down (APD) is disabled.
1 = Automatic Power Down (APD) is enabled.
Bit 3 0 = PLD Turbo is on.
1 = PLD Turbo is off, saving power.
Bit 4 0 = CLKIN input to the PLD AND array is connected.
Every CLKIN change will power up the PLD when Turbo bit is off.
1 = CLKIN input to PLD AND array is disconnected, saving power.
Bit 5 0 = CLKIN input to the PLD Micro
Cells is connected.
1 = CLKIN input to the PLD Micro
Cells is disconnected, saving power.
*Not used bit should be set to zero.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
*
PLD
*
PLD
array DBE
array Ale
array Cntl2 array Cntl1 array Cntl0
array addr
PMMR2 Register
Bit definitions (defauld is 0):
Bit 0 0 = Address A[7:0] are connected into the PLD array.
1 = Address A[7:0] are blocked from the PLD array, saving power.
Note: in XA mode, A3-0 come from PF3-0 and A7-4 come from ADIO7-4.
Bit 2 0 = Cntl0 input to the PLD AND array is connected.
1 = Cntl0 input to the PLD AND array is disconnected, saving power.
Bit 3 0 = Cntl1 input to the PLD AND array is connected.
1 = Cntl1 input to the PLD AND array is disconnected, saving power.
Bit 4 0 = Cntl2 input to the PLD AND array is connected.
1 = Cntl2 input to the PLD AND array is disconnected, saving power.
Bit 5 0 = Ale input to the PLD AND array is connected.
1 = Ale input to the PLD AND array is disconnected, saving power.
Bit 6 0 = DBE input to the PLD AND array is connected.
1 = DBE input to the PLD AND array is disconnected, saving power.
*Not used bit should be set to zero.
相关PDF资料 |
PDF描述 |
|---|---|
| PSD935F1-B-90B81I | Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 20pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: 100% Tin (Sn); Body Dimensions: 0.080" x 0.050" x 0.055"; Container: Bag; Features: MIL-PRF-55681: S Failure Rate |
| PSD935F1-B-90J | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD935F1-B-90JI | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD935F1-B-90M | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD935F1-B-90MI | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD935G2-90U | 功能描述:SPLD - 简单可编程逻辑器件 TQFP-80 5V 4M 90N RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD935G2V-90U | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD835G2V-90U RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD954F2-90J | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD854F2-90J RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD954F2-90M | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD854F2-90M RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD954F2V-90J | 功能描述:SPLD - 简单可编程逻辑器件 5.0V 2M 90ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
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