参数资料
型号: PTN3392BS/FX
厂商: NXP SEMICONDUCTORS
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PQCC48
封装: 7 X 7 MM, 0.85 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, MO-220, SOT619-1, HVQFN-48
文件页数: 25/29页
文件大小: 641K
代理商: PTN3392BS/FX
PTN3392
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 15 July 2010
5 of 29
NXP Semiconductors
PTN3392
2-lane DisplayPort to VGA adapter IC
DisplayPort
ML0_P
43
self-biasing
differential input
DisplayPort main lane signal lane 0, positive
ML0_N
44
self-biasing
differential input
DisplayPort main lane signal lane 0, negative
ML1_P
46
self-biasing
differential input
DisplayPort main lane signal lane 1, positive
ML1_N
47
self-biasing
differential input
DisplayPort main lane signal lane 1, negative
AUX_P
39
self-biasing
differential
input/output
DisplayPort auxiliary channel signal, positive
AUX_N
40
self-biasing
differential
input/output
DisplayPort auxiliary channel signal, negative
HPD
3
3.3 V TTL
single-ended output
Hot-plug detect
RGB DAC outputs
BLU
16
analog output
‘blue’ current analog output
BLU_N
19
analog output
‘blue’ current complementary analog output
GRN
21
analog output
‘green’ current analog output
GRN_N
20
analog output
‘green’ current complementary analog output
RED
25
analog output
‘red’ current analog output
RED_N
24
analog output
‘red’ current complementary analog output
RSET
22
analog input/output
DAC full-scale current control resistor.
Pull down to ground by an external
1.2 k
Ω± 1 % resistor.
DDC
SCL
11
single-ended 5 V
open-drain DDC I/O
5 V sink-side DDC clock I/O. Pulled up by
1.2 k
Ω external resistor to 5 V.
SDA
13
single-ended 5 V
open-drain DDC I/O
5 V sink-side DDC data I/O. Pulled up by
1.2 k
Ω external resistor to 5 V.
Monitor-side sync
HSYNC
15
single-ended 3.3 V
TTL output
horizontal sync signal to monitor; serial
resistance of 36
Ω is recommended.
VSYNC
14
single-ended 3.3 V
TTL output
vertical sync signal to monitor; serial
resistance of 36
Ω is recommended.
JTAG
TCK
5
input
JTAG clock input
TDO
6
output
JTAG data output
TMS
8
input
JTAG mode select input
TRST_N
9
input
JTAG reset (active LOW) input
TDI
10
input
JTAG data input
Table 2.
Pin description …continued
Symbol
Pin
Type
Description
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PTN3393BS/F1Y 制造商:NXP Semiconductors 功能描述:PTN3393BS/HVQFN40/REEL13DP//F1 - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC DISPLAYPORT TO VGA 40HVQFN
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