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| 型号： | QL5064-33BPS484I |
| 厂商： | QUICKLOGIC CORP |
| 元件分类： | 总线控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA484 |
| 封装： | PLASTIC, BGA-484 |
| 文件页数： | 14/45页 |
| 文件大小： | 635K |
| 代理商： | QL5064-33BPS484I |
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2006 QuickLogic Corporation
QL5064 QuickPCI Data Sheet Rev. I
21
AC Characteristics
The AC characteristics are calculated at V
CC = 3.3 V, TA = 25°C (K=1.00). To calculate delays, multiply the
appropriate K factor in Table 15 by the numbers presented in Table 3 through Table 10. Logic cell diagrams
Figure 12: QuickPCI Logic Cell Configuration
Table 3: Logic Cells
Symbol
Parameter
Propagation Delays (ns) Fanouta
a. Stated timing for worst case Propagation Delay over process variation at V
CC = 3.3 V and TA = 25°C. Multiply by the
appropriate Delay Factor, K, for speed grade, voltage and temperature settings as specified in the Operating Range.
1
2
3
4
8
tPD
Combinatorial Delayb
b. These limits are derived from a representative selection of the slowest paths through the QuickRAM logic cell
including typical net delays. Worst case delay values for specific paths should be determined from timing analysis of
your particular design.
1.4
1.7
2.0
2.3
3.5
tSU
Setup Timeb
1.8
tH
Hold Time
0.0
tCLK
Clock to Q Delay
0.8
1.1
1.4
1.7
2.9
tCWHI
Clock High Time
1.6
tCWLO
Clock Low Time
1.6
tSET
Set Delay
1.4
1.7
2.0
2.3
3.5
tRESET
Reset Delay
1.2
1.5
1.8
2.1
3.3
tSW
Set Width
1.9
tRW
Reset Width
1.8
Programmable
Logic Cell
5 Independent
Functions
(Optimized
for Synthesis)
OR
Single Large
Function
F1
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