- 您现在的位置：买卖IC网 > PDF目录69317 > R5F64601KFP 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP80 PDF资料下载
参数资料
| 型号： | R5F64601KFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件页数： | 32/75页 |
| 文件大小： | 663K |
| 代理商： | R5F64601KFP |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页当前第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页
57
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
13. External interrupts
The External Interrupts are triggered by the INT0 pin or any of the PCINT30:0 pins
(2). Observe that, if enabled, the
interrupts will trigger even if the INT0 or PCINT30:0 pins are configured as outputs. This feature provides a way of
generating a software interrupt. The pin change interrupt PCI1 will trigger if any enabled PCINT15:8 pin toggles.
Pin change interrupts PCI0 will trigger if any enabled PCINT7:0 pin toggles. The PCMSK3
PCMSK1, and PCMSK0 Registers control which pins contribute to the pin change interrupts. Pin change interrupts
on PCINT30:0 are detected asynchronously. This implies that these interrupts can be used for waking the part also
from sleep modes other than Idle mode.
The INT0 interrupts can be triggered by a falling or rising edge or a low level. This is set up as indicated in the
specification for the ”EICRA – External Interrupt Control Register A” on page 58. When the INT0 interrupt is
enabled and is configured as level triggered, the interrupt will trigger as long as the pin is held low. . Note that rec-
ognition of falling or rising edge interrupts on INT0 requires the presence of an I/O clock, described in ”Clock
systems and their distribution” on page 27. Low level interrupt on INT0 is detected asynchronously. This implies
that this interrupt can be used for waking the part also from sleep modes other than Idle mode. The I/O clock is
halted in all sleep modes except Idle mode.
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level must be held long
enough for the MCU to complete the wake-up to trigger the level interrupt. If the level disappears before the end of
the Start-up Time, the MCU will still wake up, but no interrupt will be generated. The start-up time is defined by the
SUT and CKSEL Fuses as described in ”System clock and clock options” on page 27.
Notes:
1. PCMSK3 and PCMSK2 are only present in Atmel ATmega3250A/3250PA/6450A/6450P.
2. PCINT30:16 are only present in ATmega3250A/3250PA/6450A/6450P. Only PCINT15:0 are present in Atmel
ATmega165A/165PA; ATmega325A/325PA and ATmega645A/645P. See ”Pin configurations” on page 2 and ”Reg-
ister description” on page 58 for details.
13.1
Pin change interrupt timing
An example of timing of a pin change interrupt is shown in Figure 13-1 on page 57.
Figure 13-1. Pin change interrupt.
clk
PCINT(n)
pin_lat
pin_sync
pcint_in_(n)
pcint_syn
pcint_setflag
PCIF
PCINT(0)
pin_sync
pcint_syn
pin_lat
D
Q
LE
pcint_setflag
PCIF
clk
PCINT(0) in PCMSK(x)
pcint_in_(0)
0
x
相关PDF资料 |
PDF描述 |
|---|---|
| R5F6460EJFP | 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP80 |
| R5F6460FJFP | 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP80 |
| R5F6460FKFP | 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP80 |
| R5F64611JFP | 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP80 |
| R5F64611KFP | 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP80 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| R5F70834RD80FTV | 制造商:Renesas Electronics Corporation 功能描述: |
| R5F70835AN80FTV | 制造商:Renesas Electronics Corporation 功能描述:Microcontroller,SH7083,ROM512K |
| R5F70845AN80FPV | 制造商:Renesas Electronics Corporation 功能描述:Microcontroller,SH7084,ROM512K |
| R5F70854AD80FPV | 制造商:Renesas Electronics Corporation 功能描述:Micro,SH-2,FL 256K,RAM16k,80MH |
| R5F70854AN80FPV | 制造商:Renesas Electronics Corporation 功能描述:Micro,SH-2,FL 256K,RAM16k,80MH |
发布紧急采购，3分钟左右您将得到回复。