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| 型号： | R5F71474BJ80FPV |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 100/123页 |
| 文件大小： | 6757K |
| 代理商： | R5F71474BJ80FPV |
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R8C/28 Group, R8C/29 Group
5. Electrical Characteristics
Rev.2.10
Sep 26, 2008
Page 50 of 67
REJ03B0169-0210
NOTES:
1. VCC = 2.7 to 5.5 V at Topr = -40 to 85
°C (J version) / -40 to 125°C (K version), unless otherwise specified.
2. Definition of programming/erasure endurance
The programming and erasure endurance is defined on a per-block basis.
If the programming and erasure endurance is n (n = 10,000), each block can be erased n times. For example, if 1,024 1-byte
writes are performed to different addresses in block A, a 1 Kbyte block, and then the block is erased, the
programming/erasure endurance still stands at one.
However, the same address must not be programmed more than once per erase operation (overwriting prohibited).
3. Endurance to guarantee all electrical characteristics after program and erase. (1 to Min. value can be guaranteed).
4. Standard of block A and block B when program and erase endurance exceeds 1,000 times. Byte program time to 1,000 times
is the same as that in program ROM.
5. In a system that executes multiple programming operations, the actual erasure count can be reduced by writing to sequential
addresses in turn so that as much of the block as possible is used up before performing an erase operation. For example,
when programming groups of 16 bytes, the effective number of rewrites can be minimized by programming up to 128 groups
before erasing them all in one operation. In addition, averaging the erasure endurance between blocks A and B can further
reduce the actual erasure endurance. It is also advisable to retain data on the erasure endurance of each block and limit the
number of erase operations to a certain number.
6. If an error occurs during block erase, attempt to execute the clear status register command, then execute the block erase
command at least three times until the erase error does not occur.
7. Customers desiring program/erase failure rate information should contact their Renesas technical support representative.
8. 125
°C for K version.
9. The data hold time includes time that the power supply is off or the clock is not supplied.
Table 5.38
Flash Memory (Data flash Block A, Block B) Electrical Characteristics(4)
Symbol
Parameter
Conditions
Standard
Unit
Min.
Typ.
Max.
Program/erase endurance(2)
10,000(3)
times
Byte program time
(program/erase endurance
≤ 1,000 times)
50
400
s
Byte program time
(program/erase endurance
> 1,000 times)
65
s
Block erase time
(program/erase endurance
≤ 1,000 times)
0.2
9
s
Block erase time
(program/erase endurance
> 1,000 times)
0.3
s
td(SR-SUS)
Time delay from suspend request until
suspend
97 + CPU clock
× 6 cycles
s
Interval from erase start/restart until
following suspend request
650
s
Interval from program start/restart until
following suspend request
0
ns
Time from suspend until program/erase
restart
3 + CPU clock
× 4 cycles
s
Program, erase voltage
2.7
5.5
V
Read voltage
2.7
5.5
V
Program, erase temperature
-40
°C
Data hold time(9)
Ambient temperature = 55
°C20
year
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相关代理商/技术参数 |
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