参数资料
型号: RCPXA272FC0520
厂商: MARVELL SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 520 MHz, MICROPROCESSOR, PBGA336
封装: 14 X 14 MM, 1.55 MM HEIGHT, 0.65 MM PITCH, LEAD FREE, CSP-336
文件页数: 118/138页
文件大小: 1048K
代理商: RCPXA272FC0520
Part 2: Flash Device Operations
Flash Programming Operations
80
Intel PXA27x Processor Family Memory Subsystem
When a programming operation is executing, issuing the Program Suspend command requests the
WSM to suspend the programming algorithm at predetermined points. The partition that is
suspended continues to output SRD after the Program Suspend command is issued. Programming
is suspended when SR[7,2] are set. Suspend latency is specified in Section 7.4, “Flash Program and
To read data from blocks within the suspended partition, the Read Array command must be issued
to that partition. Read Array, Read Status Register, Read Device Identifier, CFI Query, and
Program Resume are valid commands during a program suspend.
A program operation does not need to be suspended in order to read data from a block in another
partition that is not programming. If the other partition is already in a Read Array, Read Device
Identifier, or CFI Query state, issuing a valid address returns corresponding read data. If the other
partition is not in a read mode, one of the read commands must be issued to the partition before
data can be read.
During a program suspend, deasserting F-CE# places the flash in standby, reducing active current.
F-VPP must remain at its programming level, and F-WP# must remain unchanged while in
program suspend. If F-RST# is asserted, the flash is reset.
11.5
Flash Program Resume
The Resume command instructs the flash to continue programming, and automatically clears
Status Register bits SR[7,2]. This command can be written to any partition. When read at the
partition that’s programming, the flash outputs data corresponding to the partition’s last state. If
error bits are set, the Status Register should be cleared before issuing the next instruction. F-RST#
11.6
Flash Program Protection
When F-VPP = VIL, absolute hardware write protection is provided for all flash blocks. If F-VPP is
below VPPLK, programming operations halt and SR.3 is set indicating a F-VPP-level error. Block
lock registers are not affected by the voltage level on F-VPP; they may still be programmed and
read, even if F-VPP ≤ VPPLK.
.
Figure 26.
Example F-VPP Supply Connections
F-V
PPH
fast programming
Absolute write protection with F-V
PP ≤ VPPLK
F-V
CC
(Note 1)
F-VCC
F-VPP
F-V
PP
F-VCC
F-VPP
F-V
PPL for in-system programming
F-V
PPH fast factory programming
F-V
CC
F-V
PP
F-V
PPL
for in-system programming
Absolute write protection via logic signal
F-V
CC
F-VCC
F-VPP
Prot# (logic signal)
F-V
PPL for in-system programming
F-V
CC
F-VCC
F-VPP
≤ 10K
相关PDF资料
PDF描述
RCPXA273FC0416 416 MHz, MICROPROCESSOR, PBGA336
RCPXA273FC0520 520 MHz, MICROPROCESSOR, PBGA336
RCPXA272FC0312 312 MHz, MICROPROCESSOR, PBGA336
RCPXA271FC0312 312 MHz, MICROPROCESSOR, PBGA336
RCPXA271FC0416 416 MHz, MICROPROCESSOR, PBGA336
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