参数资料
| 型号： | RDK-236 |
| 厂商： | Power Integrations |
| 文件页数： | 13/30页 |
| 文件大小： | 0K |
| 描述： | KIT REF DESIGN PFS714EG |
| 标准包装： | 1 |
| 系列： | HiperPFS™ |
| 主要目的： | 电源管理，功率因数校正 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | PFS714EG |
| 主要属性： | 347W，370 ~ 390V 输出，90 ~ 264VAC 输入 |
| 已供物品： | 板 |
| 其它名称： | 596-1418 |
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PFS704-729EG
2 # P OUT # t HOLD _ UP
V OUT 2 - V OUT ( MIN ) 2
0.675 for powder core designs respectively. For universal input
designs, K P should be kept below 0.25 for ferrite core and 0.675
for powder core respectively. For high performance designs,
use of Litz wire is recommended to reduce copper loss due to
skin effect and proximity effect. For toroidal inductors the
numbers of layers should be less than 3 and for bobbin wound
inductors, inter layer insulation should be used to minimize inter
layer capacitance.
Output Diode
For a 385 V nominal PFC output voltage, use of a diode with
600 V or higher PIV rating is recommended. CCM operation
with hard switching demands that diodes with low reverse
recovery time and reverse recovery charge should be used. The
variable frequency CCM operation of HiperPFS reduces diode
switching losses as compared to fixed frequency solutions and
enables use of easily available high frequency diodes such as
the Turbo-2 series from STMicroelectronics. Diodes with soft
recovery characteristics that result in a reduced EMI are available
from a number of manufacturers. For highly demanding
applications such as 80 PLUS Gold power supplies, use of
Silicon Carbide diodes may be considered. These uses will
typically provide further full load improvement in efficiency.
The diodes will be required to have a forward continuous current
rating of at least 1.2 A to 1.5 A for every 100 W of output power.
Output Capacitor
For a 385 V nominal PFC, use of a electrolytic capacitor with
450 V or higher continuous rating is recommended. The
capacitance required is dependent on the acceptable level of
output ripple and any hold up time requirements. The equations
below provide an easy way to determine the required capacitance
in order to meet the hold up time requirement and also to meet
the output ripple requirements. The higher of the two values
would be required to be used:
Capacitance required for meeting the hold up requirement is
calculated using the equation:
C O =
Capacitance calculated using the above method should be
appropriately increased to account for ageing and tolerances.
Power Supply for the IC
A 12 V regulated supply should be used for the HiperPFS. If the
V CC exceeds 15 V, the HiperPFS may be damaged. In most
applications a simple series pass linear regulator made using an
NPN transistor and Zener diode is adequate since the HiperPFS
only requires approximately 3.4 mA maximum for its operation.
It is recommended that a 1 m F or higher, low ESR ceramic
capacitor be used to decouple the V CC supply. This capacitor
should be placed directly at the IC on the circuit board.
Line-Sense Network
The line-sense network connected to the V pin provides input
voltage information to the HiperPFS. The value of this resistance
sets the brown-in and brown-out threshold for the part. A value
of 4 M W is recommended for use with the universal input parts
and a value of 9 M W is recommended for the 230 VAC only
parts. Only 1% tolerance resistors are recommended. This
resistance value may be modified to adjust the brown-in
threshold if required however change of this value will affect the
maximum power delivered by the part.
A decoupling capacitor of 0.1 m F is required to be connected
from the VOLTAGE MONITOR pin to the GROUND pin of the
HiperPFS for the universal input parts and a decoupling
capacitor of 0.047 m F is required for the 230 VAC only parts.
This capacitor should be placed directly at the part on the
circuit board.
Feedback Network
A resistor divider network that provides 6 V at the feedback pin
at the rated output voltage should be used. The compensation
elements are included with the feedback divider network since
the HiperPFS does not have a separate pin for compensation.
The HiperPFS based PFC has two loops in its feedback. It has
an inner current loop and a low bandwidth outer voltage loop
which ensures high input power factor. The compensation RC
circuit included with the feedback network reduces the response
time of the HiperPFS to fast changes in output voltage resulting
from transient loads. The feedback circuit recommended for
C O
P O
t HOLD-UP
V OUT
V OUT(MIN)
PFC output capacitance in F.
PFC output power in watts.
Hold-up time specification for the power supply
in seconds.
Lowest nominal output voltage of the PFC in volts.
Lowest permissible output voltage of the PFC at
the end of hold-up time in volts.
use with the HiperPFS includes a pair of transistors that are
biased in a way that the transistors are in cutoff during normal
operation. When a rapid change occurs in the output voltage,
these transistors conduct momentarily to correct the feedback
pin voltage rapidly thereby helping the HiperPFS to respond to
the changes in output voltage without the delay associated with
a low bandwidth feedback loop.
Capacitance required for meeting the low frequency ripple
specification is calculated using the equation:
The recommended circuit and the associated component
values are shown in Figure 14.
C O =
I O ( MAX )
2 # r # f L # D V O # h PFC
Resistors, R1 to R5 comprise of the main output voltage divider
network. The sum of resistors R1, R2 and R3 is the upper
divider resistor and the lower feedback resistor is comprised of
f L
ΔV O
η PFC
I O(MAX)
Input frequency in Hz
Peak-peak output voltage ripple in volts
PFC operating efficiency
Maximum output current in amps
the sum of resistors R4 and R5. Capacitor C1 is a soft-finish
capacitor that reduces output voltage overshoot at start-up.
Resistor R8 and capacitor C3 form a low pass filter to filter any
switching noise from coupling into the FEEDBACK pin. Resistor
13
www.powerint.com
Rev. F 12/12
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