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参数资料
| 型号： | RTC-62423A-3 |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO24 |
| 封装： | SOP-24 |
| 文件页数： | 7/24页 |
| 文件大小： | 195K |
| 代理商： | RTC-62423A-3 |
RTC - 62421 / 62423
Page - 12
MQ152-05
4. CF register (control register F)
(1) RESET bit (D0)
Writing 1 to the RESET bit clears the sub-second bits of the internal counter down to the 1/8192-seconds counter. The reset
continues for as long as the RESET bit is 1. End the reset by writing 0 to the RESET bit. If the level of the CS1 pin goes low,
the RESET bit is automatically cleared to 0.
When switching the timer mode from 24-hour clock to 12-hour clock, or vice versa, write 1 to the RESET bit then 0.
Because RESET bit function is invalid on STOP bit in case of "1", please don't use it together with STOP bit.
(2) STOP bit (D1)
Writing 1 to the STOP bit stops the clock of the internal counter from the 1/8192 second bit onward. Writing 0 to the STOP bit
restarts the clock.
This function can be used to create a cumulative timer.
(3) 24/12 bit (D2)
Set the 24/12 bit to select either 12-hour clock or 24-hour clock as the timer mode. In 12-hour clock mode, the PM/AM bit is used.
i
Switching between 12-hour clock and 24-hour clock
Writing 1 to the 24/12 bit, then setting the RESET bit first to 1 then to 0, selects 24-hour clock mode.
Writing 0 to the 24/12 bit selects 24-hour clock mode. In 24-hour clock mode, the PM/AM bit is inoperative and is always 0.
Writing 0 to the 24/12 bit selects 12-hour clock mode. In 12-hour clock mode, the PM/AM bit becomes valid. It is 0 for a.m.
times and 1 for p.m. times.
ii.
Overwriting the 24/12 bit
Overwriting the contents of the 24/12 bit could destroy the contents of the registers from the H1 register upward (from the 1-
hour digit upward). Therefore, before overwriting the 24/12 bit, it is necessary to save the contents of the hour (H1, H10), day
(D1, D10), month (MO1, MO10), year (Y1, Y10), and day-of-the-week (W) registers, then re-write the data back into the
registers to suit the new timer mode, after overwriting the 24/12 bit.
iii.
Handling of RESET bit
Simply writing to the 24/12 bit does not trigger the switch over between 24-hour and 12-hour clock modes, and it is also
necessary to set the RESET bit first to 1 then to 0. Therefore, if the system proceeds to another operation without changing
the RESET bit after a write to the 24/12 bit, operation will continue without changing the timer mode. If the RESET bit is
changed later for some reason, the timer mode will change at that point. This careless change in status is not advisable from
the software point of view, and it may be difficult to determine the cause of such an error if it occurs infrequently, so make
sure that the RESET bit is changed immediately after the 24/12 bit is written to. Alternatively, design software in such a
manner that it is aware of the 24/12 bit when the RESET bit is written to.
(4) TEST bit (D3)
The TEST bit is used by EPSON for test purposes. Operation cannot be guaranteed if 1 is written to this bit, so make sure that it is
set to 0 during power-on initialization.
相关PDF资料 |
PDF描述 |
|---|---|
| RTC-62423B-0 | REAL TIME CLOCK, PDSO24 |
| RTC-72421A | 0 TIMER(S), REAL TIME CLOCK, PDIP18 |
| RTC-72421B | 0 TIMER(S), REAL TIME CLOCK, PDIP18 |
| RTC-72423A-0 | 0 TIMER(S), REAL TIME CLOCK, PDSO24 |
| RTC-72423B-0 | REAL TIME CLOCK, PDSO24 |
相关代理商/技术参数 |
参数描述 |
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