参数资料
型号: S1R72C05B10
元件分类: 总线控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA121
封装: 10 X 10 MM, 0.80 MM PITCH, PLASTIC, TFBGA-121
文件页数: 3/49页
文件大小: 545K
代理商: S1R72C05B10
4. FUNCTIONS
6
EPSON
S1R72C05*** Data Sheet (Rev.1.00)
XI
XO
Cd
Rd
Cg
Fig.4.2 Clock generation via the internal oscillator and external resonator
4.5 Power Management
This LSI includes a power management function that features six power management states: SLEEP,
SNOOZE, ACTIVE60, ACT_DEVICE, ACT_HOST, and ACT_ALL. (See Fig.4.3)
All function blocks are active in the ACT_ALL state (although the USB host function and USB device
function cannot be used simultaneously). In the SLEEP state, however, only the circuits necessary for restarting
from standby mode are active. Intermediate power management states exist between ACT_ALL and SLEEP,
depending on the required activation status.
ACT _ ALL
Active
Inactive
CPU
-I/F
FIFO
H_SIE
HTM
IDE-I/F
ACT _ HOST
CPU
-I/F
FIFO
IDE-I/F
D_SIE
DTM
H_SIE
HTM
D_SIE
DTM
ACT _ DEVICE
CPU
-I/F
FIFO
H_SIE
HTM
IDE-I/F
D_SIE
DTM
ACTIVE 60
CPU
-I/F
FIFO
H_SIE
HTM
IDE-I/F
D_SIE
DTM
SNOOZE
CPU
-I/F*
FIFO
H_SIE
HTM
IDE-I/F
D_SIE
DTM
OSC
PLL
SLEEP
CPU
-I/F*
FIFO
H_SIE
HTM
IDE-I/F
D_SIE
DTM
OSC
PLL
*The CPU-I/ F is only partially active in the SLEEP and SNOOZE
states, allowing access to the asynchronous access register.
Fig.4.3 Power management states
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