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参数资料
| 型号： | S1R72C05B10 |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA121 |
| 封装： | 10 X 10 MM, 0.80 MM PITCH, PLASTIC, TFBGA-121 |
| 文件页数： | 6/49页 |
| 文件大小： | 545K |
| 代理商： | S1R72C05B10 |
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4. FUNCTIONS
S1R72C05*** Data Sheet (Rev.1.00)
EPSON
9
4.8.4 USB Device Port External Circuits
This LSI has internal FS and HS device termination resistors, eliminating the need for additional components
normally used to adjust impedance. This allows a DP/DM line to be connected between the LSI terminal and the
connector. The appropriate components should be used to protect against static electricity and implement EMI
precautions.
The VBUS terminal uses a 5 V input and does not require external voltage conversion. However, a protection
circuit is recommended since certain commercially available USB host and hub products may apply surge
voltages that exceed VBUS ratings.
Refer to the “PCB Design Guidelines for S1R72V Series USB 2.0 High-Speed Devices” provided separately.
4.9 USB Host I/F
This LSI supports high-speed specification USB host functions that comply with USB 2.0 (Universal Serial
Bus Specification Revision 2.0) standards.
4.9.1 Speed Mode and Transfer Type
This LSI supports HS (480 Mbps), FS (12 Mbps) and LS (1.5 Mbps) speed modes when operating USB hosts.
The speed mode is automatically set through speed negotiation performed when the bus is reset.
All transfer types stipulated in the USB 2.0 standard are supported, including control, bulk, interrupt, and
isochronous transfers.
4.9.2 Resources
4.9.2.1 Channel
In this LSI, the setting register sets for transfers with end points on a one-to-one basis are referred to as
channels. This LSI features one dedicated channel for control transfers, one dedicated channel for bulk transfers,
and four general channels that support bulk, interrupt, and isochronous transfers. The endpoint number,
maximum packet size, and transfer direction (in/out) can be set as desired for all channels. Transfers are also
possible for a number of endpoints exceeding the number of channels using time-multiplexing for channels via
software.
4.9.2.2 FIFO
This LSI includes 4.5 kB of FIFO for use with USB data transfers. This forms the data transfer route with
USB. The FIFO capacity for each channel can be assigned as desired via software. For example, performance
can be improved by assigning a sufficient FIFO area to the channels for bulk transfers.
4.9.3 Data Flow
The channels are assigned to FIFO areas on a one-to-one basis, and transactions are automatically sent via
USB, depending on the FIFO effective free capacity (for IN transfers) or effective data quantity (for OUT
transfers). The software need not be directly involved in individual transactions, allowing the USB data transfer
to be controlled as data flow on the FIFO.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| S1R72U01 | 制造商:EPSON 制造商全称:EPSON 功能描述:Ease of use and easy connections (serial connections) |
| S1R72U06 | 制造商:EPSON 制造商全称:EPSON 功能描述:Ease of use and easy connections (serial connections) |
| S1R72U06F12E100 | 制造商:Epson Electronics America Inc 功能描述:USB FS Host controller with embedded HID and Mass Storage class |
| S1R72U06F12E2 | 功能描述:USB 接口集成电路 USB FS Host Ctrlr w/ HID Mass storage RoHS:否 制造商:Cypress Semiconductor 产品:USB 2.0 数据速率: 接口类型:SPI 工作电源电压:3.15 V to 3.45 V 工作电源电流: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:WLCSP-20 |
| S1R72U16 | 制造商:EPSON 制造商全称:EPSON 功能描述:Allows USB devices to be controlled as IDE devices |
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